Sr. Staff Analog Layout Engineer

Advanced Micro Devices; Singapore; On-site; SGD 80,000 - 120,000; Full time

Job summary

A leading semiconductor company in Singapore is looking for an experienced analog/mixed-signal layout design engineer to join their SerDes Technology Group. The ideal candidate will have a strong background in high-speed layout design and will collaborate with engineers across different time zones. Responsibilities include layout design, post-layout analysis, and driving layout productivity improvements. The position offers the opportunity to work with state-of-the-art technologies and contribute to innovative product development.

Benefits

Comprehensive benefits package

Qualifications

• Strong understanding of analog and mixed signal layout fundamentals.
• Experience in layout of high-speed SerDes blocks and PLLs is a plus.
• Familiarity with circuit design concepts and IC manufacturing processes.

Responsibilities

• Layout design of high-speed and high-performance SerDes analog mixed signal circuit.
• Participate in post-layout circuit performance analysis.
• Driving layout productivity improvement initiatives.

Skills

High-speed layout design

Communication skills

Analytical skills

Problem-solving

Team collaboration

Education

Bachelors or Masters degree in Computer Engineering/Electrical Engineering

Tools

Cadence SKILL

Perl

Python

Tcl

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. join us as we shape the future of AI and beyond.

Together, we advance your career.

THE ROLE

The AMD SerDesTechnology Group develops high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS process. We are currently seeking an experience analog/mixed-signal layout design engineer to join our world-class team in the development of SerDes solutions to facilitate the future connectivity of AMD CPU and GPU products.

THE PERSON

You have a passion for high speed layout design with innovative and creative ideas to solve complex design challenges. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills, and are willing to learn, and ready to take on problems.

KEY RESPONSIBILITIES

• Layout design of high speed and high performance SerDes analog mixed signal circuit in accordance to project requirements and specifications.
• Block level physical implementation which includes floor-planning, power distribution network, clock and signal routing, analog and mixed signal transistor level layout.
• Participate in post-layout circuit performance analysis.
• Participate in block/IP/chip level integration activities.
• Estimate realistic schedule, track and report clear progress and status.
• Strong participation in defining layout methodology and flow.
• Driving layout productivity improvement initiatives (i.e., pcell development and automation).
• Other responsibilities which include supervision of layout resources (onsite and offsite), assessing and correcting layout quality issues, and providing feedback to design teams.

PREFERRED EXPERIENCE

• Good understanding of analog and mixed signal layout fundamentals, IR, EM, self and coupling capacitances, RC delay and self-heating.
• Good understanding of high speed critical signal routing and shielding.
• Strong in physical design verifications (LVS/DRC/ERC/ANT/ESD/etc.).
• Familiarity with circuit design concepts/flows and IC manufacturing processes.
• Experience in layout of high-speed SerDes blocks and PLLs in advanced Fin-FET process is a plus.
• Experience with digital on top integration flow or digital SOC flow is a benefit.
• Experience with Cadence SKILL and other programming is a benefit (Perl, Python, Tcl, etc.).
• Ability to work closely with the remote & different time zones design teams.
• Excellent team player and good communication skills.

ACADEMIC CREDENTIALS

• Bachelors or Masters degree in Computer Engineering/Electrical Engineering.

LOCATION

Singapore

BENEFITS

Benefits offered are described: AMD benefits at a glance.

EEO STATEMENT

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.