Senior Staff CAD Engineer

Fox Point Recruitment LLC; Remote; SGD 95,000 - 130,000; Full time

Job summary

A leading recruitment agency is looking for an expert to develop next-generation automated design flows and tools in Singapore. The ideal candidate will have a Bachelor's degree in Electrical Engineering and 8–10 years of industry experience or a Master's/PhD with 3–5 years. Responsibilities include setting up PDKs and collaborating with design teams. Excellent problem-solving skills and proficiency in relevant design tools are crucial for success in this role.

Qualifications

• Eight to ten years of relevant industry experience required.
• Strong background in setting up and maintaining analog/mixed-signal design flows.
• Experience with advanced FinFET process technologies preferred.

Responsibilities

• Setup, maintain and support PDKs for design projects.
• Collaborate with design teams and EDA vendors on flow issues.
• Create automation scripts to enhance team efficiency.

Skills

Experience in analog/mixed-signal design flows

Proficient in Cadence Virtuoso

Proficient in Synopsys Custom Compiler

Understanding of parasitic extraction tools

Programming skills in TCL

Good written and verbal communication skills

Education

Bachelor's degree in Electrical Engineering

Masters/PhD in Electrical Engineering

Tools

Cadence Quantus

Siemens Calibre

ADE

AMS Designer

Spectre

PrimeSim

AFS

Job description

Are you ready to play a leading role on developing next-generation automated design flow and its add-on tools? We have an opportunity for you to use your extensive design and CAD knowledge to participate in defining the whole organization's design infrastructure, methodology and workflows.

Available Location: International

Sponsorship possibility: Yes

What you will do:

• Setup, maintain and support PDKs for CMOS FinFET and BiCMOS high speed design projects.
• Work closely with analog design teams and EDA vendors in solving design flow related issues.
• Collaborate with TCAD and foundry technology teams on parasitic extraction and physical verification and EMIR related topics.
• Periodically evaluate/benchmark AMS design tools and present to design teams.
• Define, develop and validate custom circuit checks and model QA flows.
• Create automation scripts to improve design/verification team's efficiency.

Education/Years of Experience:

• Bachelor's degree in Electrical Engineering.
• Eight to Ten years of relevant industry experience, or a Masters/PhD in Electrical Engineering with 3–5 years of related experience.

Industry Experience:

• Experience in setting up and maintaining analog/mixed-signal design flows for advanced FinFET process technologies.
• Proficient in industry standard design development tools like Cadence Virtuoso and Synopsys Custom Compiler.
• Good understanding of parasitic extraction tools like Cadence Quantus and Physical verification tools like Siemens Calibre.
• Good understanding of industry standard analog/mixed-signal simulation tools such as ADE, AMS Designer, Spectre, PrimeSim, AFS, etc.
• Good understanding of AMS flows including design entry, parasitic extraction, EMIR, Physical Verification and post-layout simulation.
• Programming skills in TCL, Python, Perl, SKILL, is a plus.
• Good written and verbal communication skills along with the ability to collaborate well with cross-functional teams.