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Research Fellow (Semiconductor Advanced Packaging)

NANYANG TECHNOLOGICAL UNIVERSITY

Singapore

On-site

SGD 60,000 - 80,000

Full time

Yesterday
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Job summary

A prominent university in Singapore is seeking a Research Fellow to advance low-temperature Cu/dielectric hybrid bonding for high-density interconnects. The role emphasizes hands-on semiconductor process development and requires a PhD in Materials, Microelectronics, or EEE. The ideal candidate will have expertise in process optimization and characterization techniques, and strong documentation skills are essential for effective communication. This position is critical for supporting the university's advanced packaging research initiatives.

Qualifications

  • PhD required in relevant field.
  • Hands-on experience in semiconductor process development.
  • Ability to characterize materials and interfaces using advanced techniques.

Responsibilities

  • Develop and run a Cu-Cu hybrid bonding flow for 3D integration.
  • Optimize process parameters to improve yield and quality.
  • Characterize materials and gather data for process improvements.
  • Validate reliability through testing and prototyping.
  • Produce clear technical documentation and reports.

Skills

Semiconductor process development
Process integration & optimization
Characterization techniques
Reliability mindset
Documentation and communication

Education

PhD in Materials/Microelectronics/EEE or related

Tools

Python
Matlab
Job description

School of Electrical and Electronic Engineering is one of the founding Schools of the Nanyang Technological University. Built on a culture of excellence, the School is renowned for its high academic standards and research. With over 3,000 undergraduates students and 2,000 graduate students it is one of the largest EEE schools in the world and ranks 4th in the field of Electrical & Electronic Engineering in the 2025 QS World University Rankings by Subjects.

Today, the School has become one of the world’s largest engineering schools that nurtures competent engineers and researchers. Each year, the School graduates over a thousand students who are ready to take on great ambitions and challenges.

For more details, please view: https://www.ntu.edu.sg/eee

We are seeking to hire a Research Fellow to advance low-temperature Cu/dielectric hybrid bonding for fine-pitch, high-density interconnects by developing and validating a new flow with reliable dielectric sealing under ≤200 °C. The role integrates materials selection, wafer-level process development, and reliability demonstration to deliver a manufacturable 3D‑integration solution that supports NTU’s leadership in industry-relevant advanced packaging research.

Key Responsibilities
  • Develop and run a Cu–Cu hybrid bonding flow for fine-pitch 3D integration.
  • Optimize process windows (pressure/temperature/anneal/surface activation) to minimize contact resistance and voids; maintain cleanroom/tool best practices.
  • Characterize materials and interfaces using optical/profilometry, SEM/TEM, surface chemistry, and electrical IV; translate data into process improvements.
  • Validate reliability and scalability via thermal cycling/HTS/electrical stress on test vehicles; build prototype stacks (e.g., interposer/test‑chip) to evidence manufacturability.
  • Report and collaborate: produce clear technical reports/presentations, coordinate with partners, and maintain rigorous documentation, version control, and safety compliance.
Job Requirements
  • PhD in Materials/ Microelectronics/ EEE/ or related.
  • Hands‑on semiconductor process development in cleanroom (Cu interconnect/wafer or hybrid bonding; litho/etch/CMP/plasma/anneal).
  • Characterization: optical/profilometry, SEM/TEM, XPS/AFM, electrical probing; DoE/statistics (Python/Matlab a plus).
  • Strong documentation, safety discipline, and clear communication in English‑essential for data analysis and communication with stakeholders.
  • Process integration & optimization; root‑cause/failure analysis.
  • Reliability mindset (design/interpret thermal & electrical stress tests).
  • Collaboration with tool vendors/industry partners; concise reporting; ownership.

We regret to inform that only shortlisted candidates will be notified.

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