Package Design Engineer

SILICON BOX PTE. LTD.; Singapore; On-site; SGD 50,000 - 70,000; Full time

Job summary

A leading technology company in Singapore is seeking a Package Design Engineer responsible for product and tooling design. Candidates should have a degree in electrical engineering and experience with wafer-level processes such as BGA and fan-out packaging. The role includes generating electrical layouts, managing design guidelines, and supporting audits. Fresh graduates are welcome to apply and competitive salary is offered.

Qualifications

• Minimum Degree in electrical engineering or similar discipline.
• Good understanding of design guidelines and risk assessment reports.
• Hands-on skills with design software tools.

Responsibilities

• Generate and revise electrical routing layout.
• Prepare design risk assessment reports.
• Manage conversion of internal designs into suppliers’ final design.

Skills

Wafer bumping

WLCSP

BGA packaging

Fan-out packaging

Risk assessment

Design software tools

Education

Degree in electrical engineering or similar discipline

Tools

Cadence APD

Linkcad

CAM350

AutoCAD

GDS

Gerber editors

Job description

Package Design Engineer is responsible for product and tooling design.

Candidates with wafer bumping, WLCSP, BGA or fanout packaging experience are encouraged to apply for this position.

Responsibilities

Following internal design guidelines, work with internal and external customers to:

• Generate, update, and revise electrical routing layout based on the netlist or design provided by external customers.
• Generate test vehicle design and the related PCB design.
• Prepare design risk assessment report.
• Generate reticle and stencil design.
• Generate other schematics or drawings as requested.

• Review, maintain and update the design guidelines.
• Manage the conversion of internal design into suppliers’ final design.
• Document all the drawing revisions and change records.
• Support audits.
• Any other ad-hoc duties as assigned.

Requirements

• Minimum Degree in electrical engineering or similar discipline
• Good understanding on the design guidelines and familiar in generating risk assessment report based on Fan-in/ Fan-out process capability
• Experience of using Cadence APD in RDL routing and mask design for wafer-level processes including Wafer bumping, WLCSP, BGA, eWLB and other fan-out processes will be an advantage
• Hands-on skills on design software tools like Linkcad, Cadence, CAM350, AutoCAD, GDS, Gerber editors
• Experience with PCB test board design
• Fresh graduates are welcome to apply