Senior FPGA Design Engineer - PCIe Prototyping & Validation

Synopsys Inc; Moreira; On-site; EUR 52,000 - 75,000; Full time

Job summary

Synopsys Porto team seeks a seasoned FPGA design engineer to advance PCIe-based prototypes and FPGA platforms. You will take ownership of RTL design, timing closure, and cross‑disciplinary collaboration across hardware and software in a fast-paced, innovation-driven environment.

You will contribute to high‑performance PCIe solutions, develop robust test plans, and support industry‑standard verification methods.

Qualifications

• Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, or equivalent hands‑on experience.
• Design expertise with FPGA implementations in production environments is essential.
• Strong RTL and timing analysis skills, including clock domain crossings.
• Experience with PCIe interfaces and validation is highly desirable.

Responsibilities

• Prototype and optimize PCIe-based designs on FPGA platforms through synthesis, place and route, timing closure, and board bring-up.
• Simulate and verify FPGA designs using industry verification methodologies such as UVM.
• Perform timing analysis and resolve setup/hold violations across multiple clock domains.
• Collaborate with hardware, software, and verification teams to define requirements and trade-offs.
• Develop and execute test plans to validate functionality, performance, and reliability of FPGA prototypes.
• Participate in PCI-SIG compliance activities and assist with official testing and conformance.

Skills

Verilog RTL design

PCIe FPGA design

Multi-clock domain design

Synthesis and timing closure

Vivado toolchain

Hardware/software collaboration

Python scripting

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering or Computer Engineering

Tools

Vivado

Job description

Synopsys Porto team seeks a seasoned FPGA design engineer to advance PCIe-based prototypes and FPGA platforms. You will take ownership of RTL design, timing closure, and cross‑disciplinary collaboration across hardware and software in a fast-paced, innovation-driven environment.

You will contribute to high‑performance PCIe solutions, develop robust test plans, and support industry‑standard verification methods.