Senior DRAM Layout Design Engineer | IP Layout & Tape-out

Micron Technology, Inc.

Tlaquepaque

Híbrido

MXN 600 000 - 900 000

Tempo integral

Há 4 dias
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Resumo da oferta

Micron Technology, Inc. in Mexico is seeking a DRAM Engineering Group Layout Designer to translate schematics into layout for fabrication reticules and to meet engineering criteria for DRAM products.

You will collaborate with design, CAD and global engineering teams to develop IP layouts, perform physical verification (DRC/LVS/EM), and guide colleagues through layout reviews, while planning strategies and communicating results to stakeholders worldwide.

Qualificações

  • Bachelor's or Master's degree in Electronics Engineering, VLSI Engineering or Mechatronics.
  • Experience developing custom layout designs in advanced CMOS technologies.
  • Proficiency in physical verification methodologies.
  • Strong understanding of electromigration, IR drop, latch-up, parasitic analysis, matching, shielding, coupling, and crosstalk effects.
  • Ability to collaborate with circuit designers, CAD teams, and cross-functional partners.

Responsabilidades

  • Develop and optimize IP layouts for DRAM products while ensuring compliance with design, process, and reliability requirements.
  • Perform physical verification activities including DRC, LVS, EM, quality reviews, and documentation to support successful tape-out execution.
  • Collaborate with design, CAD, and global engineering teams to solve layout challenges and drive project success.
  • Guide and support team members through layout reviews, knowledge sharing, and technical problem-solving.
  • Plan, communicate, and present layout strategies, progress, and results to stakeholders across worldwide teams.

Conhecimentos

Layout design
CMOS technologies
Physical verification
Parasitic analysis
Electromigration
Team collaboration

Formação académica

Electronics Engineering (BSc/MSc)
VLSI Engineering
Mechatronics

Ferramentas

Cadence Virtuoso
Mentor Calibre
SKILL scripting

Descrição da oferta de emprego

Micron Technology, Inc. in Mexico is seeking a DRAM Engineering Group Layout Designer to translate schematics into layout for fabrication reticules and to meet engineering criteria for DRAM products.

You will collaborate with design, CAD and global engineering teams to develop IP layouts, perform physical verification (DRC/LVS/EM), and guide colleagues through layout reviews, while planning strategies and communicating results to stakeholders worldwide.

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