DRAM Layout Engineer: VLSI/EDA Design

Micron Technology

Tlaquepaque

On-site

MXN 89,000 - 167,000

Full time

14 days+

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Job summary

Micron Technology in Mexico seeks a student intern to develop high-quality physical layouts for cutting-edge DRAM products. You will collaborate with Micron’s global design teams to learn layout building, physical verification, and use industry-standard EDA tools.

You will gain hands-on experience in CMOS layout concepts, verification workflows, and scripting, working alongside engineers on memories and advanced semiconductor processes.

Qualifications

  • Student pursuing a bachelor's degree (last 2 semesters preferred) in Electrical Engineering, Electronics Engineering, Mechatronics, Robotics, Nanotechnology, Computer Engineering, or a related field.
  • Completed coursework or academic projects related to microelectronics, semiconductor devices, VLSI, or integrated circuit design.
  • Familiarity with CMOS technology and layout design principles.
  • Basic understanding of scripting and programming languages and problem-solving abilities.

Responsibilities

  • Design and verify all levels of analog and digital layout.
  • Use computer aided design software (Cadence, Calibre, etc.).
  • Collaborate with design engineers to floor plan and design layout.
  • Follow verification protocols and apply layout techniques for digital and analog circuits.
  • Engage with build engineering to understand layout methodology.

Skills

Python
Tcl
Perl
C
C++
Linux

Education

Bachelor's degree in progress

Tools

Cadence Virtuoso
Synopsys IC Compiler II
Fusion Compiler

Job description

Micron Technology in Mexico seeks a student intern to develop high-quality physical layouts for cutting-edge DRAM products. You will collaborate with Micron’s global design teams to learn layout building, physical verification, and use industry-standard EDA tools.

You will gain hands-on experience in CMOS layout concepts, verification workflows, and scripting, working alongside engineers on memories and advanced semiconductor processes.

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