Lead HBM Layout Design Engineer

Micron Technology; Región Centro; On-site; MXN 900,000 - 1,300,000; Full time

Job summary

Micron Technology Guadalajara is seeking a Layout Design engineer for high-bandwidth memory projects. You will develop analog and mixed-signal blocks, lead layout tasks, and collaborate with global teams across multiple projects.

The role demands 12+ years in analog layout, BE/MTech in Electronic/VLSI, and strong proficiency with Cadence VLE/VXL and Calibre LVS/DRC. On-site in Guadalajara with global teamwork responsibilities.

Qualifications

• 12+ years of analog/custom layout design in advanced CMOS processes.
• BE or MTech in Electronic/VLSI Engineering.
• Expertise with LVS/DRC and layout verification tools.
• Experience leading layout tasks and mentoring juniors.

Responsibilities

• Design and develop critical analog/mixed-signal blocks and full chip integration.
• Perform layout verification and quality checks (LVS/DRC/Antenna).
• Ensure on-time delivery of block-level layouts with quality.
• Lead planning, estimation, scheduling, and delegation across projects.
• Guide junior/senior team members on sub-block layouts and reviews.
• Coordinate with global engineering teams to ensure project success.

Skills

Analog layout

Mixed-signal design

Planar FinFET CMOS

Cadence VLE/VXL

Mentor Calibre DRC/LVS

Team leadership

Project planning

Education

BE in Electronic/Electrical Engineering

MTech in Electronic/VLSI Engineering

Tools

Cadence VLE/VXL

Mentor Graphics Calibre DRC/LVS

Cadence Virtuoso

Job description

Micron Technology Guadalajara is seeking a Layout Design engineer for high-bandwidth memory projects. You will develop analog and mixed-signal blocks, lead layout tasks, and collaborate with global teams across multiple projects.

The role demands 12+ years in analog layout, BE/MTech in Electronic/VLSI, and strong proficiency with Cadence VLE/VXL and Calibre LVS/DRC. On-site in Guadalajara with global teamwork responsibilities.