Senior HBM Layout Design Engineer for AI & HPC

micron; Xalisco; Presencial; MXN 850.000 - 1.200.000; Jornada completa

Descripción de la vacante

Micron Technology, in Guadalajara, Mexico, is seeking a Layout Design Engineer to contribute to analog, mixed-signal and full-chip level integration for advanced memory technologies.

You will perform layout verifications, plan and deliver block layouts on time, and collaborate with global engineering teams across multiple projects, leveraging Cadence VLE/VXL and Mentor Calibre tools. A BE or MTech in Electronic/VLSI is required.

Formación

• BE or MTech in Electronic/VLSI Engineering or related field
• Hands-on experience in analog/custom layout and layout verification
• Cadence VLE/VXL and Mentor Calibre DRC/LVS expertise

Responsabilidades

• Design and development of analog, mixed-signal, and full-chip level layouts.
• Perform LVS/DRC checks, antennas, and quality verification.
• Lead planning, estimation, scheduling, and execution to meet project goals.
• Coordinate with global teams to ensure layout project success.

Conocimientos

Analog layout

Layout verification

Project planning

Team communication

Educación

BE or MTech in Electronic/VLSI Engineering

Herramientas

Cadence VLE/VXL

Mentor Calibre DRC/LVS

Descripción del empleo

Micron Technology, in Guadalajara, Mexico, is seeking a Layout Design Engineer to contribute to analog, mixed-signal and full-chip level integration for advanced memory technologies.

You will perform layout verifications, plan and deliver block layouts on time, and collaborate with global engineering teams across multiple projects, leveraging Cadence VLE/VXL and Mentor Calibre tools. A BE or MTech in Electronic/VLSI is required.