HBM Layout Design Lead - Analog/Mixed-Signal Expert

Micron Technology, Inc

Tlaquepaque

Híbrido

MXN 1.000.000 - 1.400.000

Jornada completa

14 días+
Generador de candidaturas

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Descripción de la vacante

Micron Technology, Inc. in Guadalajara, Mexico is seeking a Principal Layout Design Engineer for its HBM team. You will design and verify analog, mixed-signal, and digital blocks for high-bandwidth memory, collaborating with global teams on multiple projects.

The ideal candidate has 12+ years in analog/custom layout, a BE or MTech in Electronic/VLSI, and hands-on Cadence VLE/VXL and Mentor Calibre. You will lead planning, sub-block layouts, and on-time delivery.

Formación

  • 12+ years in analog/custom layout design in advanced CMOS processes.
  • BE or MTech in Electronic/VLSI Engineering.
  • Expertise in Cadence VLE/VXL and Mentor Calibre DRC/LVS.
  • Experience laying out blocks like PLL, ADC, DAC, LDO, Bandgap, etc.
  • Knowledge of layout fundamentals and their impact on speed, power and area.
  • Ability to manage design constraints and deliver high-quality layouts.

Responsabilidades

  • Design and development of analog, mixed-signal and custom digital blocks and full chip integration.
  • Perform LVS/DRC/Antenna checks, quality checks, and documentation.
  • Ensure on-time delivery of block-level layouts with quality.
  • Lead planning, area/time estimation, scheduling, delegation and execution across multiple projects.
  • Guide junior and senior teammates on sub-block layouts and reviews.
  • Coordinate with global engineering teams to assure layout project success.

Conocimientos

Analog Layout
Custom Layout
Planar/FinFET
CMOS Knowledge
Team Leadership
Layout Verification

Educación

BE or MTech in Electronic/VLSI Engineering

Herramientas

Cadence VLE/VXL
Mentor Calibre DRC/LVS

Descripción del empleo

Micron Technology, Inc. in Guadalajara, Mexico is seeking a Principal Layout Design Engineer for its HBM team. You will design and verify analog, mixed-signal, and digital blocks for high-bandwidth memory, collaborating with global teams on multiple projects.

The ideal candidate has 12+ years in analog/custom layout, a BE or MTech in Electronic/VLSI, and hands-on Cadence VLE/VXL and Mentor Calibre. You will lead planning, sub-block layouts, and on-time delivery.

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