DRAM Physical Layout Engineer

Micron Technology; Jalisco; Presencial; MXN 89.000 - 134.000; Jornada completa

Descripción de la vacante

Micron Technology in Mexico is seeking a student intern to contribute to high‑quality DRAM layout development. You will collaborate with global design teams to gain hands‑on experience in layout building, physical verification, and industry‑standard EDA tools.

The role targets a bachelor’s student in Electrical/Electronics/Mechatronics or related fields, with coursework in microelectronics or VLSI. Basic scripting is a plus; position is on‑site in Mexico.

Formación

• Pursuing bachelor’s degree in Electrical/Electronics/Mechatronics/Robotics or related field.
• Completed coursework related to microelectronics, semiconductor devices, VLSI, or IC design.
• Basic understanding of CMOS technology and layout design principles.

Responsabilidades

• Design and verify analog and digital layouts at all levels.
• Use CAD tools like Cadence, Calibre for layout and verification.
• Collaborate with design engineers to floor plan and design layout.
• Follow verification protocols and layout methodologies.
• Apply layout techniques for pitch, array, and peripheral components.

Conocimientos

CMOS basics

Layout principles

Problem solving

Scripting basics

Team collaboration

Educación

Bachelor's degree in Electrical Engineering or related

Last 2 semesters preferred

Herramientas

Cadence Virtuoso

Synopsys IC Compiler II

Fusion Compiler

Descripción del empleo

Micron Technology in Mexico is seeking a student intern to contribute to high‑quality DRAM layout development. You will collaborate with global design teams to gain hands‑on experience in layout building, physical verification, and industry‑standard EDA tools.

The role targets a bachelor’s student in Electrical/Electronics/Mechatronics or related fields, with coursework in microelectronics or VLSI. Basic scripting is a plus; position is on‑site in Mexico.