DRAM Layout Engineer: Analog & Digital Design

Micron; Jalisco; On-site; MXN 134,000 - 201,000; Part time

Job summary

Micron Technology, Inc. seeks a student intern to develop high-quality physical layouts for cutting-edge DRAM products in a collaborative, global setting. You will gain hands-on experience with semiconductor layout building, physical verification, and industry-standard EDA tools.

The role emphasizes CMOS layout principles, scripting basics, and teamwork with design engineers, while contributing to memory technology advancements at Micron.

Qualifications

• Pursuing bachelor’s degree in Electrical Engineering or related field with last two semesters.
• Completed coursework or projects in microelectronics, semiconductor devices, VLSI or IC design.
• Basic CMOS and layout design understanding.

Responsibilities

• Design and verify all levels of analog and digital layout.
• Use CAD software such as Cadence, Calibre, etc.
• Collaborate with design engineers to floor plan and layout.
• Follow verification protocols and apply layout techniques for CMOS circuits.
• Learn layout methodology with build engineering and understand circuit concepts.

Skills

CMOS basics

Python

Linux

EDA tools familiarity

Education

Bachelor's degree in Electrical Engineering or related

Tools

Cadence Virtuoso

Synopsys IC Compiler II

Fusion Compiler

Verilog/VHDL basics

Job description

Micron Technology, Inc. seeks a student intern to develop high-quality physical layouts for cutting-edge DRAM products in a collaborative, global setting. You will gain hands-on experience with semiconductor layout building, physical verification, and industry-standard EDA tools.

The role emphasizes CMOS layout principles, scripting basics, and teamwork with design engineers, while contributing to memory technology advancements at Micron.