Analog IC Design Lead - SerDes

IC Resources; Sassari; Remoto; EUR 80.000 - 120.000; Tempo pieno

Descrizione del lavoro

A technology firm is seeking an experienced Analog IC Design Lead to take ownership of the SerDes analog and mixed-signal design strategy. This senior leadership role offers the flexibility of fully remote work. The ideal candidate will have extensive experience in high-speed circuit design and proven leadership in analog design for SerDes applications. Join to shape advanced CMOS FinFET technologies and lead engineering teams.

Competenze

• 15+ years’ industry experience required.
• Proven leadership in analog and mixed-signal design for SerDes applications.
• Exceptional communication and decision-making skills.

Mansioni

• Provide technical leadership for the design of key SerDes IP.
• Oversee the development of core analog building blocks.
• Define and drive SerDes architecture in collaboration with teams.
• Establish verification and sign-off strategies to meet performance targets.
• Lead and mentor engineering teams in design and simulation.
• Support silicon bring-up, validation and characterisation for product launch.

Conoscenze

Leadership in analog design

High-speed circuit design

Signal integrity

Power integrity

Proficiency with EDA tools

Formazione

Bachelor’s or Master’s in Electrical Engineering

Descrizione del lavoro

I am recruiting for an innovative and fast-growing technology company developing next-generation solutions for high-performance data communication. This is a senior leadership role with the flexibility of fully remote working.

As an Analog IC Design Lead , you will take ownership of the full SerDes analog and mixed-signal design strategy, guiding technical direction, mentoring engineers, and ensuring delivery of industry-leading performance. You will shape the architecture, influence design methodologies, and play a pivotal role in the successful release of complex products in advanced CMOS FinFET technologies.

Key Responsibilities

• Provide technical leadership for the design of key SerDes IP
• Oversee and be involved in the development of core analog building blocks
• Define and drive SerDes architecture in collaboration with system architects and other functional teams
• Establish robust verification and sign-off strategies to meet aggressive performance and reliability targets
• Lead and mentor engineering teams, fostering best practices in design, simulation, and layout
• Support silicon bring-up, validation and characterisation, providing direction through to product launch

Requirements

Bachelor’s or Master’s in Electrical Engineering or related discipline, with 15+ years’ industry experience

Proven leadership in analog and mixed-signal design for SerDes applications

Strong expertise in high-speed circuit design, signal integrity, and power integrity

Proficiency with EDA tools

Exceptional communication and decision-making skills, with the ability to lead in a fast-paced, collaborative environment

If you are an experienced engineer with a track record in FINFET SerDes design, get in touch with Parm Shergill.