Principal Engineer

Synopsys, Inc.; Brackley; On-site; GBP 100,000 - 125,000; Full time

Job summary

A leading technology company in the UK is seeking an experienced Principal Engineer to provide technical leadership in design and emulation of mixed-signal SoCs. This role requires over 15 years in ASIC development and expertise with hardware emulation platforms like Zebu and HAPS. Candidates should have strong communication and mentoring abilities and a proven track record in validating complex systems. Join us to innovate and shape the future of silicon technologies, fostering an inclusive engineering culture.

Benefits

Comprehensive health and wellness benefits

Financial benefits offered

Qualifications

• Recognized expertise with hardware emulation platforms and FPGA prototyping.
• Proven leadership in developing UVM-based verification environments.
• Strong track record of mentoring and leading engineering teams.

Responsibilities

• Providing technical leadership in mixed-signal SoC design.
• Driving hardware emulation strategies on FPGA platforms.
• Guiding creation and optimization of verification environments.
• Leading workflow enhancements through advanced scripting.
• Collaborating with teams to resolve challenges.

Skills

Technical leadership

Digital signal processing

System validation

High-speed protocols

Mentoring and coaching

Education

15+ years of experience in ASIC design and verification

Tools

Zebu

HAPS

UVM

SystemVerilog

FPGA

Shell

Perl

Python

C++

Job description

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a visionary and highly accomplished digital design and verification engineer with over 15 years of impactful experience in ASIC development, large-scale system validation, and hardware emulation. As a Principal Engineer, you are recognized for your technical leadership, strategic thinking, and exceptional ability to architect, model, and validate complex mixed-signal SoC systems. Your expertise spans advanced hardware emulation platforms such as Zebu and HAPS, and you have a proven track record of building and optimizing integrated PHY platforms, as well as back-to-back environments on hardware.

You bring a deep understanding of digital signal processing, high-speed serializer/deserializer (SerDes) architectures, and signal PHY development. Your experience includes leading multi-disciplinary teams, driving technical roadmaps, and mentoring engineers to deliver best-in-class solutions for protocols like PCIE, Ethernet, and USB.

Your strong communication skills and collaborative approach enable you to bridge cross-functional teams and engage effectively with customers and stakeholders. You thrive on solving the toughest technical challenges, setting new benchmarks for design quality, and guiding products from concept to successful deployment. You are committed to fostering innovation, inclusivity, and continuous learning within your team, and you are eager to drive Synopsys’ next-generation silicon architectures to new heights.

What You’ll Be Doing:

• Providing technical leadership and architectural direction for the design and emulation of advanced mixed-signal SoCs, including next-generation SerDes PHY products.
• Driving the development and integration of hardware emulation strategies on FPGA platforms (Zebu, HAPS).
• Orchestrating the build and validation of system-level prototypes for industry-leading protocols (PCIE, Ethernet, USB, etc.), ensuring seamless integration with PHY builds.
• Guiding the creation and optimization of verification environments using UVM and SystemVerilog, overseeing testbench and VIP integration for complex architectures.
• Leading automation initiatives and workflow enhancements through advanced scripting in Shell, Perl, Python, and C++.
• Mentoring and coaching engineering teams, fostering technical excellence and knowledge sharing across the organization.
• Collaborating with cross-functional groups and customers to resolve challenges, ensure design quality, and meet aggressive project milestones.
• Driving continuous improvement in functional and performance testing on hardware and test-chips, and leading architectural refinements based on analysis.

The Impact You Will Have:

• Set the strategic technical direction for flagship silicon IP products, influencing industry standards and Synopsys’ product roadmap.
• Accelerate product innovation and time-to-market by establishing best practices in emulation, validation, and system integration.
• Enhance product differentiation, reliability, and performance—delivering measurable value to global customers.
• Drive cross-team synergy, technical mentorship, and a culture of continuous learning and inclusivity.
• Elevate Synopsys’ reputation as a leader in advanced SerDes and PHY solutions for high-performance SoCs.
• Directly impact customer success by providing expert guidance, technical support, and innovative solutions.
• Champion diversity and inclusion, ensuring a respectful and opportunity-rich workplace for all team members.

What You’ll Need:

• 15+ years of experience in ASIC design, verification, system validation, and technical leadership roles.
• Recognized expertise with hardware emulation platforms (Zebu, HAPS) and FPGA-based prototyping for signal PHY and back-to-back systems.
• In-depth knowledge of system-level validation for high-speed protocols (PCIE, Ethernet, USB) and digital signal processing architectures.
• Proven leadership in developing and optimizing UVM-based verification environments and SystemVerilog testbenches.
• Advanced scripting proficiency in Shell, Perl, Python, and C++ for workflow automation and process improvement.
• Experience in building and deploying RIK and integrating system builds with PHY hardware.
• Strong track record of mentoring, coaching, and leading engineering teams to technical excellence.
• Excellent communication, stakeholder management, and organizational skills.
• Experience with firmware development and microprocessor integration is a plus.

Who You Are:

• A visionary technical leader with a passion for innovation, excellence, and strategic problem-solving.
• An inspiring mentor and collaborator, able to motivate and guide diverse teams toward shared goals.
• Highly organized, detail-focused, and able to manage complex projects and shifting priorities under tight deadlines.
• Adaptable, resourceful, and eager to drive continuous improvement and technical advancement.
• Committed to building an inclusive, diverse, and high-performing engineering culture.

The Team You’ll Be A Part Of:

Join a world-class team of principal and senior engineers specializing in the design, emulation, and validation of advanced silicon IP solutions. Our team operates at the forefront of semiconductor innovation, collaborating across domains to deliver industry-defining products for global customers. You will play a pivotal role in shaping technical strategy, mentoring top talent, and driving breakthrough solutions that push the boundaries of what’s possible in high-performance SoC design.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.