Senior Verification Engineer

JR Spain; España; Presencial; EUR 30.000 - 50.000; Jornada completa

Descripción de la vacante

A leading semiconductor firm in Spain is seeking a highly experienced Senior Verification Engineer. This role involves working on cutting-edge SoC designs that will shape the future of advanced technologies. Candidates must have a Master’s degree and proven tapeouts experience. The position offers a hybrid working model across locations in Ghent, Barcelona, or Rome.

Formación

• Proven experience in 3 successful tapeouts.
• Expertise in UVM/System Verilog.
• Experience with Formal Verification.

Responsabilidades

• Join a team working on cutting-edge SoC designs.
• Contribute to game-changing semiconductor technology.

Conocimientos

UVM/System Verilog

Scripting languages (Python, Perl, Bash)

Tapeouts experience

Educación

Master’s degree in a relevant field

Descripción del empleo

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I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape the future of AI, HPC, and other advanced technologies.

Required Skills & Experience

• Master’s degree in a relevant field.
• Proven experience in 3 successful tapeouts
• Expertise in UVM/System Verilog
• Experience with Formal Verification
• Experience with scripting languages such as Python, Perl or Bash
• Knowledge of NoC, PCIe, DDR and other standard peripherals is desirable but not essential

This Senior Verification Engineer role offers a unique opportunity to contribute to game-changing semiconductor technology, with the flexibility of a hybrid working model in either Ghent, Barcelona or Rome.