Sr Staff Engineer, SoC RTL Design

Tenstorrent Inc.; Toronto; On-site; CAD 80,000 - 100,000; Full time

Job summary

A cutting-edge AI technology firm is seeking a Staff Digital Design Engineer in Toronto to define and optimize high-performance IP and SoC architectures. Ideal candidates will have expertise in digital design, RTL development, and experience with performance-aware design. This hybrid role offers competitive compensation and the opportunity to work on the forefront of AI technology.

Benefits

Highly competitive compensation package

Benefits

Qualifications

• Deep understanding of computer architecture and IP microarchitecture.
• Comfortable with full ASIC flows.
• Experience with microarchitecture of high-performance IP and SoC architectures.

Responsibilities

• Architecture and RTL implementation of custom IP blocks and SoC components.
• Performance-aware design decisions for compute and memory-heavy blocks.
• Support backend teams with strong synthesis and timing closure awareness.

Skills

Digital design expertise

RTL development (Verilog/VHDL)

Power, Performance, Area optimization

Collaborative skills

Job description

Overview

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

We are looking for a Staff Digital Design Engineer to help define, build, and optimize high-performance IP and SoC architectures for next-gen AI and compute workloads. This role is ideal for engineers who thrive at the intersection of microarchitecture, RTL implementation, and performance-aware design.

This role is hybrid, based out of Toronto, Ottawa, Boston, or Austin.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Responsibilities

• Architecture and RTL implementation of Tenstorrent’s custom IP blocks and SoC components.
• Performance-aware design decisions for compute, interconnect, or memory-heavy blocks.
• Occasional contributions to validation using emulation, FPGA prototyping, or UVM flows.
• Strong synthesis and timing closure awareness to support backend teams.
• Help define, build, and optimize high-performance IP and SoC architectures for next-gen AI and compute workloads.

Qualifications

• A digital design expert with a deep understanding of computer architecture and IP microarchitecture.
• Skilled in RTL development (Verilog/VHDL) and familiar with full ASIC flows.
• Comfortable optimizing for power, performance, and area (PPA) under aggressive design goals.
• A naturally collaborative and technical engineer — you thrive in spec definition, peer reviews, and team-wide planning.

What You Will Learn

• How cutting-edge AI chips are built, from spec to silicon.
• What it takes to collaborate with teams designing novel processor and memory architectures.
• How to blend custom logic with standard SoC elements for power and scale.
• How cross-functional workflows come together across design, DV, physical, and firmware teams.

Location and Environment

This role is hybrid, based out of Toronto, Ottawa, Boston, or Austin.

Equal Opportunity

Tenstorrent offers a highly competitive compensation package and benefits. We are an equal opportunity employer.