Senior DSP Physical Design Engineer

Qualcomm; Markham; On-site; CAD 85,000 - 120,000; Full time

Job summary

A leading semiconductor company in Canada is seeking a talented Physical Design Engineer to innovate and implement DSP cores. You will handle complete physical design flows, optimize power and performance, and ensure tapeout readiness. Ideal candidates should hold a Bachelor's or Master's in Electrical Engineering, with over 7 years of experience and expertise in relevant tools like Cadence Innovus and Synopsys. This role offers a collaborative environment focused on innovation and technical excellence.

Benefits

Cutting-edge projects

Collaborative team environment

Qualifications

• 7+ years of industry experience in Physical Design for ASIC/SoC.
• Hands-on expertise with timing closure tools.
• Strong understanding of DFT and ECO flows.

Responsibilities

• Own and execute complete Physical Design flow from netlist to GDSII.
• Perform PPA analysis and optimization.
• Manage tapeout activities and ensure DRC, LVS sign-off.

Skills

Physical Design flow expertise

PPA optimization

Scripting (Perl/TCL, Python)

Timing optimization

Power integrity analysis

Place & Route tools

Education

Bachelor's or Master's degree in Electrical Engineering

Tools

Cadence Innovus

Synopsys ICC2/Fusion Compiler

Synopsys PrimeTime

Job description

A leading semiconductor company in Canada is seeking a talented Physical Design Engineer to innovate and implement DSP cores. You will handle complete physical design flows, optimize power and performance, and ensure tapeout readiness. Ideal candidates should hold a Bachelor's or Master's in Electrical Engineering, with over 7 years of experience and expertise in relevant tools like Cadence Innovus and Synopsys. This role offers a collaborative environment focused on innovation and technical excellence.