Staff Package Design Engineer - 2.5D/3D Packaging Lead

Renesas Electronics Corp.; Tempe (AZ); On-site; USD 180,000 - 240,000; Full time

Job summary

Renesas Electronics Corp. is seeking a Staff packaging architect to guide the architecture and physical design of next‑generation semiconductor packages, including 2.5D/3D chiplet integration and high-density interposers.

You will coordinate across SI/PI, thermal, and platform teams and drive new design rules and methodologies. As a technical focal point, you will mentor junior engineers, establish standardized CAD workflows, and lead design reviews to balance electrical and mechanical

Qualifications

• 8+ years of related experience with a Bachelor’s degree (or 6+ years with a Master’s degree); OR 5+ years of intensive R&D experience in advanced 2.5D/3D heterogeneous packaging with demonstrated experience establishing new design rules and authoring engineering BKMs.
• Advanced Packaging Expertise: Strong background in advanced substrate-based packages, flip-chip layout, multi-die/chiplet-based architectures, thermal mitigation, and high-density routing.
• CAD Proficiency: High proficiency with industry-standard package design tools, specifically Siemens/Mentor Xpedition (Layout / Substrate Integrator), Valor NPI, and Cadence Allegro Package Designer/SIP Layout.
• Cross-Disciplinary Acumen: Working understanding of SI/PI fundamentals, impedance control, crosstalk mitigation, and ability to balance these constraints against pin budgets.
• Leadership & Communication: Strong communication and technical documentation skills, with a proven ability to lead multi-disciplinary test vehicles or product design meetings and secure tooling/supplier approvals independently.

Responsibilities

• Lead package layout architecture for next-generation heterogeneous integration, including 2.5D/3D chiplet packaging, high-density interposers, bridge technologies, RDL, and advanced FCBGA solutions.
• Define, establish, and optimize package design rules and assembly BKMs; partner with foundries, substrate vendors, and OSATs to evaluate and validate advanced packaging capabilities, DRCs, and manufacturing limits.
• Act as the primary package architecture focal point across SI/PI, thermal, tooling, and platform integration teams; lead design reviews to align requirements and balance pin budgets against electrical/mechanical trade-offs.
• Manage the complex package design cycle—including footprint assignment, stack-up structures, high-speed escape routing, power/ground distribution, and generation of manufacturing release outputs (Gerber/drill data, bump maps, assembly drawings).
• Provide technical mentorship and guidance to junior and intermediate package design engineers, establishing standardized CAD workflows, layout techniques, and training to drive consistent execution.

Skills

Advanced packaging

Leadership

Cross-disciplinary acumen

CAD proficiency

Communication

Education

Bachelor's or Master's degree in Mechanical Engineering, Electrical Engineering, Microelectronics, Materials Science, or related discipline

Tools

Siemens Mentor Xpedition

Valor NPI

Cadence Allegro Package Designer

Job description

Renesas Electronics Corp. is seeking a Staff packaging architect to guide the architecture and physical design of next‑generation semiconductor packages, including 2.5D/3D chiplet integration and high-density interposers.

You will coordinate across SI/PI, thermal, and platform teams and drive new design rules and methodologies. As a technical focal point, you will mentor junior engineers, establish standardized CAD workflows, and lead design reviews to balance electrical and mechanical