Hybrid Principal Package Design Engineer — Advanced Packaging

Renesas Electronics Corp.

Austin (TX)

Hybrid

USD 140,000 - 190,000

Full time

14 days+

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Job summary

Renesas Electronics America is seeking a Principal Package Design Engineer to lead development of advanced packaging solutions for high-performance semiconductors. This role focuses on architecture, assembly processes, thermal and mechanical reliability, and cross-functional collaboration with design, applications, product engineering, manufacturing, suppliers, and quality teams.

The ideal candidate will bring deep expertise in packaging technologies and a track record of bringing complex

Qualifications

MSc or PhD in Electrical Engineering, Materials Science, Mechanical Engineering, Chemical Engineering, or a related field.
5+ years of experience in advanced semiconductor packaging or advanced electronics packaging and system integration.
Strong hands-on knowledge of advanced packaging technologies, materials, assembly processes, and application system integration as they apply to AI infrastructure and data center power management.
Deep understanding of thermal, mechanical, and electrical interactions in package design and extensive, hands-on model setup, simulations, and analysis.
Experience working with OSATs, substrate vendors, assembly houses, and semiconductor supply chains.
Proven ability to troubleshoot packaging failures, drive root cause/corrective action, and demonstrate strong project leadership and cross-functional communication skills.

Responsibilities

Lead design, development, and qualification of advanced semiconductor packaging solutions (Flip-chip, WLP/FOWLP, 2.5D/3D, SiP, BGA/CSP).
Define package architecture based on electrical, thermal, mechanical, reliability, and cost requirements with deep simulation.
Drive OSAT selection and development for new product introductions (NPI).
Collaborate with IC design, substrate, board, thermal, reliability, applications, and manufacturing teams to ensure package performance.
Oversee package layout reviews, stack-up definition, material selection, and interconnect strategy.
Perform and guide simulations on signal integrity, power integrity, thermal, and mechanical stress; design for manufacturability.