Staff DDR6 Memory Verification Engineer

Renesas Electronics; Duluth (GA); On-site; USD 140,000 - 190,000; Full time

Benefits offered by this job

Medical benefits

Health Savings Account (HSA)

401(k) with company match

Paid time off

Job summary

Renesas Electronics is seeking an experienced Staff Design Verification Engineer to join our memory interface team. You will verify high‑performance memory data buffer products targeting data center, AI, and cloud computing applications, focusing on DDR6 and beyond.

The role demands deep SystemVerilog and UVM proficiency, strong debugging skills, and a track record in block- and system‑level verification. Prior DDR/memory experience is a plus, with opportunities to influence reusable

Qualifications

• 8+ years of semiconductor design verification experience.
• Strong SystemVerilog and UVM proficiency.
• Bachelor's or Master's in EE/CE/CS or related field.

Responsibilities

• Drive verification activities for complex digital designs at the block and system level.
• Develop and execute verification plans based on functional and performance specifications.
• Develop, maintain, and optimize SystemVerilog/UVM verification environments and testbenches.
• Develop verification tests, functional coverage, checkers, and other verification components.
• Take ownership of verification environments and verification execution for assigned blocks and features.
• Drive and monitor coverage to ensure verification goals are achieved.
• Work closely with design engineers to ensure designs meet requirements and are effectively verifiable.
• Analyze verification results, debug failures, and identify functional or design issues.
• Develop efficient, reusable verification environments and methodologies with a focus on quality, performance, and ease of use.
• Identify and implement improvements to verification processes, methodologies, and design behavior.
• Participate in feasibility studies and technical reviews.
• Serve as a technical resource within the team, providing guidance on complex verification problems and sharing best practices.
• Communicate verification status, risks, and results to project stakeholders.

Skills

SystemVerilog

UVM

Semiconductor design verification

Analytical thinking

Education

Bachelor's or Master's in Electrical Engineering, Computer Engineering, Computer Science, or related field

Tools

UVM-based verification environments

Job description

Renesas Electronics is seeking an experienced Staff Design Verification Engineer to join our memory interface team. You will verify high‑performance memory data buffer products targeting data center, AI, and cloud computing applications, focusing on DDR6 and beyond.

The role demands deep SystemVerilog and UVM proficiency, strong debugging skills, and a track record in block- and system‑level verification. Prior DDR/memory experience is a plus, with opportunities to influence reusable