Senior Digital Verification Lead - DDR6 Memory Interfaces

Renesas Electronics Corporation; Duluth (GA); On-site; USD 120,000 - 160,000; Full time

Benefits offered by this job

Medical benefits

Dental & vision

Life insurance

Job summary

Renesas Electronics Corporation is seeking a memory interface verification expert to advance the verification of DDR6 data buffers used in AI/datacenter workloads. The role focuses on developing digital sections of high-bandwidth, low-power memory data buffer chips for DDR5/DDR6 and beyond, with system-level integration and UVM-based testbenches.

You will own verification environments, drive test plans and coverage, collaborate with design teams, and propose process improvements to achieve

Qualifications

• Masters in Electrical Engineering, Computer Engineering, or equivalent with 7+ years of experience.
• Bachelor's Degree in Electrical Engineering, Computer Engineering, or equivalent with 9+ years of experience

Responsibilities

• Drive the Memory interface products verification effort, including defining the verification strategy, developing test plans, coverage, and executing tests.
• Drive and quality control the creation of a verification test plan.
• Work closely with the design team to ensure that the design meets the requirements and is testable.
• Identify and drive improvements to the verification process to ensure the highest levels of quality and efficiency.
• Drive and monitor coverage of design verification.
• Provide regular updates to management on the status of the verification effort.

Skills

DDR6 verification

UVM

Testbench development

Verification planning

System-level testing

Memory interfaces

Education

Masters in Electrical/Computer Engineering

Bachelor's in Electrical/Computer Engineering

Job description

Renesas Electronics Corporation is seeking a memory interface verification expert to advance the verification of DDR6 data buffers used in AI/datacenter workloads. The role focuses on developing digital sections of high-bandwidth, low-power memory data buffer chips for DDR5/DDR6 and beyond, with system-level integration and UVM-based testbenches.

You will own verification environments, drive test plans and coverage, collaborate with design teams, and propose process improvements to achieve