A complete application in a minute
Tailored resume and cover letter, ready to send.
Renesas is seeking a Senior Staff Design Verification Engineer to provide technical leadership for verification of memory interface products for data center, AI, and cloud applications. The role focuses on DDR6 and future generations, leveraging SystemVerilog and UVM to drive verification strategy and test environments.
Candidates should have 10+ years in semiconductor design verification, strong leadership, and proven ability to mentor engineers while coordinating with design and verification
Renesas is seeking a Senior Staff Design Verification Engineer to provide technical leadership for verification of memory interface products for data center, AI, and cloud applications. The role focuses on DDR6 and future generations, leveraging SystemVerilog and UVM to drive verification strategy and test environments.
Candidates should have 10+ years in semiconductor design verification, strong leadership, and proven ability to mentor engineers while coordinating with design and verification