SoC Verification Lead: System-Level, Tape-Out Expert

Velaura AI, Inc.; Santa Clara (CA); Hybrid; USD 200,000 - 300,000; Full time

Benefits offered by this job

Medical, dental, and vision coverage

Paid time off

Flexible work arrangements

Professional development opportunities

Equity compensation

Job summary

Velaura AI, Inc. is seeking an experienced verification leader to own system-level verification of the Physical AI SoC and drive the tape-out milestone.

You will collaborate with architects, RTL, firmware, and software teams to ensure correct behavior, performance, and safety across boot, security, and power domains. You will mentor a small team, shape verification architecture, and stay hands-on with code while coordinating cross-domain activities from CPU-based simulations to emulation and

Qualifications

• 12+ years in design verification with significant SoC level experience.
• Proven track record leading SoC verification across multiple projects to sign-off and tape-out.
• Experience building and leading verification teams.
• Strong SystemVerilog, UVM, C and C++ with coverage-driven verification.
• Experience with CPU-based SoCs (ARM or RISC-V) simulation flows.
• Knowledge of PCIe and LPDDR5/LPDDR6 IO/memory subsystems.
• Experience verifying boot/root of trust, clock/reset, and low-power behavior at system level.
• Excellent communication and cross-functional influence.

Responsibilities

• Own the SoC verification strategy, plan, and execution for the Velaura Physical AI SoC.
• Build and lead a verification team, setting technical direction and reviewing work.
• Define verification architecture/environment and remain hands-on in code.
• Coordinate verification across boot/security, clock/reset, low power, IO and memory subsystems.
• Define sign-off criteria and coverage goals; drive closure through tape-out.
• Track verification progress, coverage, and risk for engineering leadership.
• Collaborate with architecture, RTL, DFT, firmware and software for system-level correctness.
• Partner with CAD/infrastructure on simulation, emulation, and regression capacity.

Skills

SoC verification leadership

SystemVerilog

UVM

C/C++

ARM/RISC-V

PCIe

LPDDR5/LPDDR6

Boot and root of trust

Clock and reset topology

Low power verification

CDC/RDC/UPF flows

Emulation

FPGA prototyping

QA leadership

Cross-functional collaboration

Education

Bachelor's or higher in Electrical/Computer Engineering

Tools

Emulation

FPGA prototyping

Simulation

Job description

Velaura AI, Inc. is seeking an experienced verification leader to own system-level verification of the Physical AI SoC and drive the tape-out milestone.

You will collaborate with architects, RTL, firmware, and software teams to ensure correct behavior, performance, and safety across boot, security, and power domains. You will mentor a small team, shape verification architecture, and stay hands-on with code while coordinating cross-domain activities from CPU-based simulations to emulation and