Senior SoC Verification Lead for System-Level Tapeout

Velaura; Santa Clara (CA); On-site; USD 200,000 - 300,000; Full time

Benefits offered by this job

Medical coverage

Dental coverage

Vision coverage

Paid time off

Flexible work arrangements

Professional development

Equity compensation

Job summary

Velaura is seeking an experienced verification leader to verify and deliver its next generation Physical AI SoC. You will work with architects, RTL engineers, software teams and system teams to ensure correctness, performance, reliability and safety from RTL blocks to full hardware/software workloads.

You will own the SoC verification plan through sign-off and tape-out, covering boot, root of trust, clock/reset topology, low-power behavior, and IO/memory subsystems.

Qualifications

• 12+ years in design verification with significant SoC-level experience.
• Proven track record leading SoC verification across multiple projects through sign off and tape out.
• Experience building and leading a verification team.

Responsibilities

• Own the SoC verification strategy, plan and execution for the Velaura Physical AI SoC.
• Build and lead a team of SoC verification engineers, setting technical direction and reviewing their work.
• Define the SoC verification architecture and environment, and stay hands on in the code.
• Coordinate verification across boot and security, clock and reset, low power, and the IO and memory subsystems.
• Define sign off criteria and coverage goals, and drive closure through tape out.
• Track and report verification progress, coverage and risk to engineering leadership.
• Work with architecture, RTL, DFT, firmware and software teams on system level correctness and pre silicon bring up.
• Partner with CAD and infrastructure teams on simulation, emulation and regression capacity.

Skills

SystemVerilog

UVM

C++

C

SoC verification

Boot/Root of Trust

PCIe IP

LPDDR5/LPDDR6

Job description

Velaura is seeking an experienced verification leader to verify and deliver its next generation Physical AI SoC. You will work with architects, RTL engineers, software teams and system teams to ensure correctness, performance, reliability and safety from RTL blocks to full hardware/software workloads.

You will own the SoC verification plan through sign-off and tape-out, covering boot, root of trust, clock/reset topology, low-power behavior, and IO/memory subsystems.