Senior CPU Verification Engineer – High-Performance SoC

Velaura AI, Inc.; Santa Clara, Northern (CA, KY); Hybrid; USD 200,000 - 350,000; Full time

Job summary

Velaura AI, Inc. is seeking a Design Verification Engineer to verify its next-generation Physical AI SoC.

You will own verification for the custom CPU, from test plans to coverage closure, collaborating with architects, RTL and software teams to ensure correctness, performance and safety. You will build portable verification environments, develop instruction-level stimuli, validate memory behavior, and drive regressions across hardware and software boundaries, contributing to silicon bring up

Qualifications

• 8+ years verifying high performance CPUs or complex digital designs.
• Strong computer architecture and microarchitecture fundamentals.
• Experience with SystemVerilog, UVM, C and C++, assertions and coverage driven verification.
• Experience owning a block or unit of a design independently from test plan through coverage closure.
• Experience writing test plans, portable testbenches and transactors.
• Experience debugging complex issues across hardware and software boundaries.
• BS or higher in Computer Engineering, Electrical Engineering or Computer Science.

Responsibilities

• Own verification of custom CPU units including instruction fetch, decode, load store, and the instruction, data and last level caches.
• Turn architecture intent into detailed test and coverage plans.
• Build verification environments with SystemVerilog, UVM, C and C++ with portable testbenches and coverage.
• Develop instruction level stimulus and compare against a golden ISA simulator.
• Verify memory ordering, coherence, exceptions and privilege behavior.
• Verify latency, bandwidth and cache behavior against high performance targets under workloads.
• Execute regressions through design and environment bring up, track bug/coverage metrics.
• Support emulation, FPGA prototyping and pre-silicon software bring up, drive RCA across HW/SW boundaries.

Skills

8+ years CPU verification

Computer architecture

Test plans & portable testbenches

Debugging across HW/SW

SystemVerilog/UVM

C/C++

Block/unit ownership

Education

BS or higher in Computer Engineering, Electrical Engineering or Computer Science

Tools

SystemVerilog

UVM

C

C++

Job description

Velaura AI, Inc. is seeking a Design Verification Engineer to verify its next-generation Physical AI SoC.

You will own verification for the custom CPU, from test plans to coverage closure, collaborating with architects, RTL and software teams to ensure correctness, performance and safety. You will build portable verification environments, develop instruction-level stimuli, validate memory behavior, and drive regressions across hardware and software boundaries, contributing to silicon bring up