SoC Verification Engineer - UVM & ASIC/SoC Expert

Insight Global

Carlsbad (CA)

On-site

USD 110,000 - 160,000

Full time

25 hours ago
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Job summary

Insight Global is seeking a collaborative Design Verification Engineer with 5–12 years of industry experience to help create cutting edge SoC designs delivered first time right. You will work in a collaborative environment, participating in architectural decisions and verification strategies that directly impact product success.

This role involves developing UVM-based verification environments, creating block and system level verification plans, and leading debug efforts with cross-functional

Qualifications

  • Bachelor's degree in Electrical Engineering or related field is required.
  • Experience developing UVM-based testbenches for ASIC or SOC verification.
  • Proven ability to create test plans and verification infrastructure.
  • Knowledge of verification methodologies from block to system level.

Responsibilities

  • Develop and implement UVM-based verification environments.
  • Create comprehensive verification plans at block and system levels.
  • Design verification components including assertions, traffic generators, agents, and scoreboards.
  • Collaborate with cross-functional teams on testability and verification requirements.
  • Lead debug efforts and provide solutions for complex technical challenges.

Skills

UVM Based testbench development
ASIC/SOC verification experience
Test plans and verification infra
Block to system level verification

Education

Bachelor's degree in Electrical Engineering

Job description

Insight Global is seeking a collaborative Design Verification Engineer with 5–12 years of industry experience to help create cutting edge SoC designs delivered first time right. You will work in a collaborative environment, participating in architectural decisions and verification strategies that directly impact product success.

This role involves developing UVM-based verification environments, creating block and system level verification plans, and leading debug efforts with cross-functional

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