Senior SoC Verification Engineer - UVM & SystemVerilog

TechDigital Group; Midland (TX); On-site; USD 120,000 - 150,000; Full time

Job summary

TechDigital Group seeks an experienced ASIC Verification Engineer to own end-to-end verification across multiple design blocks. You will develop and maintain testbenches, sequences, agents, and scoreboards using SystemVerilog and UVM from scratch.

You will execute directed and constrained tests, debug deeply, and drive coverage closure for complex networking silicon and interconnect ASICs. Strong collaboration with customer teams is essential.

Qualifications

• End-to-end verification ownership experience across multiple blocks.
• Expert-level proficiency in SystemVerilog and UVM with testbench development from scratch.
• Hands-on verification of high-speed protocols like UCIe 2.0, PCIe, Ethernet.

Responsibilities

• Block-Level Verification Ownership: take technical ownership of verifying 4-5 complex design blocks per project.
• Testbench & Component Development: build and maintain verification components, test sequences, agents, scoreboards, and coverage models from scratch using SystemVerilog and UVM.
• Verification Execution: run directed and constrained-random tests, debug thoroughly, drive functional and code coverage closure.
• Protocol Application: apply knowledge of UCIe 2.0, PCIe, Ethernet to verify architectural features.
• Collaboration: interface with customer engineering teams and internal leads to align block-level verification with top-level testbenches.
• Debugging & Triage: perform waveform analysis, protocol debugging, root-cause analysis, and regression triage.

Skills

SystemVerilog

UVM

Debugging

Testbench development

Waveform analysis

Tools

Synopsys VCS

Cadence Xcelium

Mentor Questa

Job description

TechDigital Group seeks an experienced ASIC Verification Engineer to own end-to-end verification across multiple design blocks. You will develop and maintain testbenches, sequences, agents, and scoreboards using SystemVerilog and UVM from scratch.

You will execute directed and constrained tests, debug deeply, and drive coverage closure for complex networking silicon and interconnect ASICs. Strong collaboration with customer teams is essential.