Shape the Future: ASIC Package Design Intern/Co-op

Advanced Micro Devices; San Jose, Santa Clara (CA, CA); Hybrid; USD 33,000 - 55,000; Full time

Job summary

Advanced Micro Devices (AMD) invites ambitious students to join as an ASIC Package Engineering intern/co-op in San Jose, CA, for Spring/Summer or Summer-Fall terms. You’ll work full-time in hybrid or onsite settings, contributing to packaging design, verification, and yield analysis on AMD products.

Applicants should be enrolled in a US university for a Master’s in Electrical/Computer/Mechanical/Materials Engineering, with interest in packaging, PCB design, scripting, and data analytics.

Qualifications

• Currently enrolled in a US-based university pursuing a Master’s degree in Electrical Engineering, Engineering Science, Computer Engineering, Mechanical Engineering, Materials Science Engineering, or a related field.
• Knowledge of transmission lines and electric circuits is a plus.
• Experience with package, silicon or PCB design software and scripting languages (Perl/Python/SQL) is encouraged.
• Understanding of semiconductor theory and packaging processes/technology, and data analytics/tools like PowerBI.

Responsibilities

• Support Package design and Package Development Engineers in prioritizing and optimizing new projects.
• Train to complete substrate, interposer and bump designs for AMD products, test vehicles and probe card substrates.
• Assist in design verification to ensure performance, quality and efficiency.
• Analyze yield and defect metrics to improve design performance and yield.
• Evaluate and benchmark packaging materials and collaborate with partners for cost-efficient designs.

Skills

Electrical engineering

Engineering science

Computer engineering

Mechanical engineering

Material science engineering

Data analytics

PowerBI

Perl

Python

SQL

Semiconductor theory

Packaging process

Education

Master’s degree (pursuing) in EE/Engineering Science/CE/ME/Materials

Tools

PowerBI

Package design software

PCB/Si design tools

Job description

Advanced Micro Devices (AMD) invites ambitious students to join as an ASIC Package Engineering intern/co-op in San Jose, CA, for Spring/Summer or Summer-Fall terms. You’ll work full-time in hybrid or onsite settings, contributing to packaging design, verification, and yield analysis on AMD products.

Applicants should be enrolled in a US university for a Master’s in Electrical/Computer/Mechanical/Materials Engineering, with interest in packaging, PCB design, scripting, and data analytics.