Senior Wireless PHY Verification Engineer

Apple Inc.; San Diego (CA); On-site; USD 175,000 - 309,000; Full time

Benefits offered by this job

Apple Benefits

Relocation assistance

Tuition reimbursement

Job summary

Apple Inc. in California seeks a highly experienced PHY Design Verification Engineer to lead pre-silicon RTL verification of wireless PHY interfaces within a world-class wireless SoC team.

You will collaborate with DV methodologists, designers, and systems engineers to build reusable test benches and verification environments, driving coverage and DV quality across projects. You will verify PHY subsystem microarchitectures, develop tests, analyze coverage, and validate designs using

Qualifications

• BS and a minimum of 10 years relevant industry experience.
• Verification experience of wireless/wired communication block/subsystem.
• Advanced knowledge of Verilog, SystemVerilog, UVM, and SystemVerilog Assertion.
• Excellent knowledge and experience of ASIC verification flows including test bench development, constrained random testing, and code/functional coverage.

Responsibilities

• Work closely with the system and design teams to review and understand the PHY subsystem microarchitecture, and create verification plans from specifications, review and refine to achieve coverage targets.
• Build block/subsystem level test benches with a reference model, using the best-in-class DV methodology. Architect test benches with maximum reusability in mind.
• Develop and execute both directed and constrained random tests, debug failures, manage bug tracking, and work with designers to drive closure of issues found.
• Create and analyze block/subsystem-level coverage models, and add test cases to increase coverage.
• Use machine learning and AI technologies to identify design and test bench issues and ensure DV quality.
• Support PHY subsystem validation using Palladium and/or FPGA.

Skills

Verilog

SystemVerilog

UVM

SystemVerilog Assertions

Test Benches

Python scripting

Education

BS in EE

Tools

Palladium

FPGA

Matlab

Job description

Apple Inc. in California seeks a highly experienced PHY Design Verification Engineer to lead pre-silicon RTL verification of wireless PHY interfaces within a world-class wireless SoC team.

You will collaborate with DV methodologists, designers, and systems engineers to build reusable test benches and verification environments, driving coverage and DV quality across projects. You will verify PHY subsystem microarchitectures, develop tests, analyze coverage, and validate designs using