Senior Silicon Packaging Architect — End-to-End Solutions

Intel Corporation; Phoenix (AZ); On-site; USD 164,000 - 312,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Vacation

Job summary

Intel Corporation in Phoenix, AZ seeks a Senior Silicon Packaging Design Architect to lead end-to-end package solutions, driving electrical, mechanical, and cost targets while translating product requirements into robust package architectures.

You will work with silicon, hardware, and packaging teams to deliver high-quality designs, resolve reliability challenges, and implement co-design strategies with board teams to improve performance and cost efficiency.

Qualifications

• US Citizenship required.
• Ability to obtain and maintain US Government TS/SCI Security Clearance with Polygraph.
• Bachelor's degree in electrical engineering, mechanical engineering, chemical engineering, materials science or STEM field with 6+ years of experience.
• Master's degree in electrical engineering, mechanical engineering, chemical engineering, materials science or STEM field with 4+ years of experience.
• Ph.D. in electrical engineering, mechanical engineering, chemical engineering, materials science or STEM field with 2+ years of experience.
• 2+ years of hands-on experience in semiconductor fabrication, chip assembly, or packaging.
• Experience in electromagnetic simulation tools such as Mentor, Cadence tools, SPICE, Ansys tools, or similar platforms.
• Experience with Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP, Concept HDL, Sigrity) and/or Mentor Xpedition platform tools (PCB Layout/XPD, Designer, Hyperlynx).
• In-depth knowledge of assembly processes, test methodologies, and characterization techniques.

Responsibilities

• Translate product requirements into detailed package architecture specifications.
• Drive technology tradeoff decisions to ensure silicon packages conform to electrical, mechanical, thermal, and reliability standards.
• Collaborate with silicon, hardware, and package teams to deliver high-quality package solutions and overcome roadblocks.
• Oversee the end-to-end package development process, including design, procedures, and continuous improvements to quality standards.
• Troubleshoot packaging designs and resolve issues related to materials and processes, providing innovative and cost-effective solutions.
• Implement co-design strategies between silicon and board design teams to optimize product performance and cost.
• Collaborate with EDA partners to advance package design tools and optimize design methods.

Skills

Analytical skills

Communication

Organizational skills

Multitasking

Education

Bachelor's degree + 6+ yrs

Master's degree + 4+ yrs

Ph.D. + 2+ yrs

Tools

Mentor

Cadence

SPICE

Ansys

Allegro

Xpedition

Job description

Intel Corporation in Phoenix, AZ seeks a Senior Silicon Packaging Design Architect to lead end-to-end package solutions, driving electrical, mechanical, and cost targets while translating product requirements into robust package architectures.

You will work with silicon, hardware, and packaging teams to deliver high-quality designs, resolve reliability challenges, and implement co-design strategies with board teams to improve performance and cost efficiency.