Senior Power Package Design Engineer – SiP/Flip-Chip

Renesas Electronics Corporation

Plano (TX)

On-site

USD 150,000 - 210,000

Full time

4 days ago

Be an early applicant

A complete application in a minute

Tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

Renesas Electronics Corporation is seeking a senior packaging engineer to design and develop advanced power SiP and wafer‑level packaging solutions. You will lead cross‑functional teams, qualify materials and processes, and work with OSAT/CM partners to accelerate reliable production ramps.

The role requires 10–15 years in power packaging, strong analytical abilities, and excellent communication skills to collaborate with product groups and reliability teams.

Qualifications

PhD/Master/BS in physics, chemistry, mechanical, electrical or materials engineering.
10–15 years of experience in package development emphasizing power SiP/module, wafer level & flip-chip LGA packaging.
Strong understanding of power SiP/modules with substrates or embedded die/capacitor and assembly process knowledge.

Responsibilities

Design and develop package and interconnect methods for power SiP/modules and related packaging.
Qualify package technologies for consumer, industrial and automotive power applications.
Benchmark, select and qualify materials, processes and OSAT/CM partners; develop DOE to optimize processes.

Skills

Power SiP knowledge

Wafer level packaging

Flip-chip LGA packaging

Process integration

Communication skills

Education

Doctorate/Masters / Bachelor’s Degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering

Tools

SPC software

Statistical analysis software

Job description

The role requires 10–15 years in power packaging, strong analytical abilities, and excellent communication skills to collaborate with product groups and reliability teams.

Get your free, confidential resume review.

or drag and drop your file here.