Principal Power SiP Packaging Engineer

Renesas Electronics Corp.; Plano (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

Renesas Electronics Corp. is seeking a senior-level packaging engineer to design, develop, and qualify power SiP and related interconnects.

The role focuses on wafer-level packaging, flip-chip LGA, and working with OSAT/CM partners to optimize processes and ensure high reliability for automotive, industrial, and consumer applications. You will lead DOE studies, establish process specs, and coordinate with Product and Reliability teams to qualify new packages within tight timeframes, driving

Qualifications

• Engineering degree (PhD/MS/Bachelor) in Physics, Chemistry, Mechanical, Electrical or Materials Engineering.
• 10-15 years of relevant experience in package development emphasizing power SiP/module, wafer level & flip-chip LGA packaging.
• Strong understanding of power SiP/modules which has an substrate or embedded die/capacitor, assembly process knowledge, qualification methods, SPC and statistical analysis software.
• Knowledge of Cu FSM/BGBM technologies a plus.
• Strong interpersonal and communication skills.
• Strong analytical and presentation skills.

Responsibilities

• Design and develop package and interconnect methods for power SiP/modules, flip-chip LGA, and related packaging.
• Qualification of package technologies for consumer, industrial, and automotive power applications.
• Benchmark, select and qualify materials, processes and OSAT/CM partners.
• DOE with OSAT/CM to optimize processes and establish specifications.
• Qualify new packages with Product and Reliability teams within deadlines.
• Resolve process integration issues with window checks on critical steps.
• Establish production controls and monitor quality.
• Support ramp-up and smooth transition into production.
• Collaborate with OSAT/CM to address early production issues and ensure high-quality parts.
• Maintain expertise in power SiP, wafer level packaging and flip-chip interconnects.

Skills

Power SiP packaging

Wafer level packaging

Flip-chip LGA

Process qualification

SPC & statistics

Interpersonal skills

Analytical & presentation

Education

Engineering degree (PhD/MS/Bachelor) in Physics, Chemistry, Mechanical, Electrical or Materials Engineering

Tools

Cu FSM/BGBM

Job description

Renesas Electronics Corp. is seeking a senior-level packaging engineer to design, develop, and qualify power SiP and related interconnects.

The role focuses on wafer-level packaging, flip-chip LGA, and working with OSAT/CM partners to optimize processes and ensure high reliability for automotive, industrial, and consumer applications. You will lead DOE studies, establish process specs, and coordinate with Product and Reliability teams to qualify new packages within tight timeframes, driving