Senior Physical Design Engineer — Tapeout & PPA Expert

Normal Computing Corporation; Mountain View (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Normal Computing in Mountain View is seeking an experienced Physical Design Engineer to own end-to-end silicon realization, from synthesis and floorplanning through timing signoff and GDSII tapeout. You will drive the backend flow, optimize PPA, and ensure signoff readiness in a fast-paced environment with RTL and architecture teams.

The role requires a tapeout pedigree, hands-on use of standard PD tools, and collaboration across cross-functional teams to deliver tapeout-successful designs on

Qualifications

• 3+ successful tapeouts from netlist to signoff.
• Deep hands-on experience with industry-standard physical design tools across floorplanning, P&R, CTS, and signoff timing closure.
• Strong backend debugging instincts for STA timing bottlenecks, IR/EM, crosstalk, and DRC/LVS signoff issues.
• Ability to collaborate with RTL, architecture, and DFT teams to ensure early physical feasibility.

Responsibilities

• Lead the full netlist-to-GDSII physical design flow, including floorplanning, power grid design, placement, CTS, and P&R.
• Own static timing analysis (STA) and timing closure across corners and modes.
• Drive physical optimization for power, performance, and area (PPA) and signal integrity.
• Execute full chip/block physical signoff checks (DRC/LVS/ERC) and antenna fixes.
• Collaborate on design and floorplan reviews to influence feasibility and pin placement.
• Create and support tapeout checklists and post-silicon physical debugging.

Tools

Innovus

IC Compiler II

Tempus

PrimeTime

Pegasus

Calibre

Job description

Normal Computing in Mountain View is seeking an experienced Physical Design Engineer to own end-to-end silicon realization, from synthesis and floorplanning through timing signoff and GDSII tapeout. You will drive the backend flow, optimize PPA, and ensure signoff readiness in a fast-paced environment with RTL and architecture teams.

The role requires a tapeout pedigree, hands-on use of standard PD tools, and collaboration across cross-functional teams to deliver tapeout-successful designs on