Senior Physical Design Engineer – ASIC/SoC Tape-out Expert

Sapien Engineering; California; In loco; USD 130.000 - 190.000; Tempo pieno

Descrizione del lavoro

Sapien Engineering is seeking a Senior Physical Design Engineer to join a leading global semiconductor company on a permanent basis. The role is full-time and based on-site in California, with locations in San Jose, San Diego, or Irvine.

The candidate will contribute to the full physical design cycle from RTL to tape-out, using Cadence Innovus and related flows. The ideal candidate will have 12+ years of physical design experience, proficiency in synthesis, STA, timing closure, P&R,

Competenze

• 12+ years of experience in physical design.
• Full physical design cycle – RTL to tape-out.
• Cadence Innovus
• Synthesis, STA + timing closure, including top-level STA
• Place & Route
• Floorplanning – top-level floorplanning highly preferred
• Physical verification + EM/IR analysis
• TCL and/or PERL scripting
• Flow and methodology development
• Proven track record delivering complex ASIC/SoC designs through tape-out

Conoscenze

12+ years experience

RTL to tape-out

Senior Physical Design

Formazione

Bachelor’s degree in Electrical/Electronics Engineering

Strumenti

Cadence Innovus

Synthesis

STA

Place & Route

Floorplanning

Physical verification

EM/IR analysis

TCL scripting

PERL scripting

Descrizione del lavoro

Sapien Engineering is seeking a Senior Physical Design Engineer to join a leading global semiconductor company on a permanent basis. The role is full-time and based on-site in California, with locations in San Jose, San Diego, or Irvine.

The candidate will contribute to the full physical design cycle from RTL to tape-out, using Cadence Innovus and related flows. The ideal candidate will have 12+ years of physical design experience, proficiency in synthesis, STA, timing closure, P&R,