Senior Mask Design Engineer — Equity Eligible

NVIDIA; Arizona; On-site; USD 136,000 - 259,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA is seeking a Senior Mask Design Engineer to shape advanced silicon interposers. You will work with package teams to craft precise layouts using Cadence tools, ensuring quality and on-time delivery for NVIDIA products.

Required 5+ years in mask/layout, deep CMOS layout knowledge, and Cadence Virtuoso proficiency; scripting skills like Perl/Python are a plus. Equity and benefits available.

Qualifications

• Hold a B.S. Electrical Engineering or equivalent experience.
• Minimum of 5+ years proven experience in Mask and Layout Design.
• Deep understanding of layout concepts in submicron CMOS technologies.
• Proficient with Cadence layout tools, particularly Virtuoso.
• Experience with verification tools such as Calibre, ICV, Thunder.

Responsibilities

• Collaborate cross functionally with PTL and engineers to deliver solutions on tight schedules.
• Perform physical layout for silicon interposer using Cadence tools.
• Conduct design feasibility studies to evaluate size, cost, and performance goals.
• Study layout floorplan and perform custom layout with verification against DRC and netlists.
• Propose layout design trade-offs to the PTL for resolution and implementation.

Skills

Perl

Python

Skill

Education

B.S. Electrical Engineering

Tools

Cadence Virtuoso

Calibre

ICV

Thunder

Job description

NVIDIA is seeking a Senior Mask Design Engineer to shape advanced silicon interposers. You will work with package teams to craft precise layouts using Cadence tools, ensuring quality and on-time delivery for NVIDIA products.

Required 5+ years in mask/layout, deep CMOS layout knowledge, and Cadence Virtuoso proficiency; scripting skills like Perl/Python are a plus. Equity and benefits available.