Senior HBM Memory Architect (3D-Stacked DRAM)

Micron Technology, Inc.

Richardson (TX)

On-site

USD 140,000 - 210,000

Full time

14 days+

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Job summary

Micron Technology, Inc. is seeking an HBM Memory Design Engineer to design, simulate, and floorplan digital and analog DRAM circuits used in advanced HBM technology.

You will collaborate with cross-functional teams to deliver high‑performance, low‑power memory solutions across 3D stacking and TSV integration. The role requires a strong background in CMOS circuit design with 7+ years (or 5+ years with an MSEE) and hands-on experience with HSPICE or FineSim for circuit verification, along with

Qualifications

  • BSEE with 7+ years of circuit design experience or MSEE with 5+ years of experience.
  • Strong CMOS design knowledge and device physics understanding.
  • Proficiency with schematic entry and SPICE-based simulation (HSPICE, FineSim) and power/network analysis.

Responsibilities

  • Design, simulate, and optimize digital and analog DRAM circuits including data path, ECC, command/control, and high‑speed timing structures.
  • Evaluate full‑chip and block‑level functionality and propose solutions for correct circuit and system behavior.
  • Perform timing, area, power, and complexity analyses for high‑speed DRAM and mixed‑signal circuits.
  • Collaborate with multi-functional teams across build, verification, product engineering, process, and packaging.

Skills

CMOS circuit design
Schematic entry
Python scripting
Analytical problem solving

Education

BSEE
MSEE

Tools

HSPICE
FineSim
Power distribution analysis tools

Job description

Micron Technology, Inc. is seeking an HBM Memory Design Engineer to design, simulate, and floorplan digital and analog DRAM circuits used in advanced HBM technology.

You will collaborate with cross-functional teams to deliver high‑performance, low‑power memory solutions across 3D stacking and TSV integration. The role requires a strong background in CMOS circuit design with 7+ years (or 5+ years with an MSEE) and hands-on experience with HSPICE or FineSim for circuit verification, along with

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