Senior HBM Core-Die Architect & Circuit Design Engineer

Micron Technology, Inc.; Boise (ID); On-site; USD 150,000 - 210,000; Full time

Benefits offered by this job

Medical plans

Paid time off & holidays

Job summary

Micron Technology, Inc. is seeking an engineer to own HBM core-die architecture and associated DRAM circuit design, driving architecture decisions, feasibility studies, and ARD development for next‑gen 3D‑stacked HBM products.

You will collaborate with Array, Datapath, ECC, TSV, PDN, Layout, Verification, and DFT teams to deliver end‑to‑end design execution, support silicon bring‑up, and contribute to verification methodologies.

Qualifications

• Proven experience in DRAM architecture and circuit design (HBM, DDR, LPDDR, GDDR, or equivalent).
• Strong understanding of DRAM array architecture, row/column paths, sensing, datapath, refresh, and reliability mechanisms.
• Hands-on experience with SPICE-based circuit simulation tools.

Responsibilities

• Own HBM core-die architecture including Bank/Bank-Group organization, array partitioning, datapath, refresh, and reliability features.

Skills

DRAM architecture

Circuit design

Transistor-level simulation

Tools

HSPICE

Spectre

FineSim

PrimeSim

Job description

Micron Technology, Inc. is seeking an engineer to own HBM core-die architecture and associated DRAM circuit design, driving architecture decisions, feasibility studies, and ARD development for next‑gen 3D‑stacked HBM products.

You will collaborate with Array, Datapath, ECC, TSV, PDN, Layout, Verification, and DFT teams to deliver end‑to‑end design execution, support silicon bring‑up, and contribute to verification methodologies.