Principal HBM Design Architect

Micron Technology, Inc; Richardson (TX); On-site; USD 120,000 - 160,000; Full time

Benefits offered by this job

Medical insurance

Dental insurance

Vision insurance

Paid family leave

Paid time off

Paid holidays

Job summary

Micron Technology, Inc is seeking a Principal HBM Design Architect in Richardson, Texas. In this role, you will design, simulate, and optimize advanced DRAM circuits for High Bandwidth Memory products, collaborating with teams on AI and ML solutions.

Successful candidates will have significant experience in CMOS design and memory architecture, along with strong analytical skills. The position offers comprehensive benefits, including medical and paid time off.

Qualifications

• 7+ years with BSEE or 5+ years with MSEE in relevant engineering experience.
• Strong knowledge of CMOS circuit design and semiconductor device physics.
• Experience with schematic entry and simulation tools.

Responsibilities

• Design, simulate, and optimize DRAM memory arrays.
• Evaluate functionality and propose correctness solutions.
• Analyze timing, area, power trade-offs in designs.

Skills

CMOS circuit design

Semiconductor device physics

Schematic entry and simulation tools

Power delivery analysis

Scripting languages (Python, Tcl, Perl)

Education

BSEE or MSEE

Tools

FineSim

HSPICE

Job description

Principal HBM Design Architect

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

For more than 43 years, Micron Technology has delivered world‑leading memory and semiconductor solutions. As an HBM Memory Design Engineer on the HBM Architecture Team, you will design, simulate, optimize, and floorplan advanced DRAM circuits for next‑generation High Bandwidth Memory products. You will work across digital, analog, and mixed‑signal domains to ensure functional correctness, performance, and power efficiency. Your role includes collaborating with globally distributed teams developing modern HBM solutions for AI and ML applications.

Responsibilities

• Design, simulate, and optimize DRAM memory arrays, data paths, ECC, command/control logic, and high‑speed interface circuits
• Evaluate block‑level and full‑chip functionality and propose solutions to ensure functional correctness
• Analyze timing, area, power, and complexity trade‑offs in high‑speed DRAM and mixed‑signal designs
• Perform pathfinding and feasibility studies for new architectures and future HBM products
• Contribute to the design, layout, and optimization of memory, logic, and analog circuits
• Support large‑scale verification, debug, and silicon validation activities
• Collaborate across multi-functional teams involved in TSV‑based 3D stacking and vertical integration
• Participate in design reviews and drive continuous improvement of design methodologies

Minimum Qualifications

• BSEE with 7+ years or MSEE with 5+ years of relevant engineering experience
• Strong knowledge of CMOS circuit design and semiconductor device physics
• Experience with schematic entry and simulation using FineSim, HSPICE, or equivalent tools
• Experience with power delivery and power network analysis
• Proficiency in scripting languages such as Python, Tcl, or Perl

Preferred Qualifications

• Familiarity with DRAM or memory subsystem design
• Strong analytical, debugging, and problem‑solving skills
• Effective communication skills with a creative and forward‑thinking approach

Relocation

TBD

Benefits

Micron offers medical, dental, vision, income protection, paid family leave, paid time off, and paid holidays.

Equal Employment Opportunity

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.