HBM Architecture: Senior Mixed-Signal Design Architect

Micron Technology; Richardson (TX); On-site; USD 146,000 - 297,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time-off

Paid holidays

Job summary

Micron Technology in Richardson, TX is seeking a Design Architect at Senior/Principal/Staff level to help build the next generation of high-bandwidth memory for AI workloads. You will design, simulate, analyze, and optimize 3D-stacked memories and interfaces with close collaboration across architecture and design teams.

Responsibilities include defining circuit implementations, power delivery for stacked memories, thermal improvements, and on-/off-chip interfaces, plus timing, area and power

Qualifications

• Analog/mixed-signal design experience with simulation and floorplanning.
• Transistor-level simulation with corner analysis.
• Ability to analyze architecture tradeoffs and derive specifications.
• Power delivery analysis experience.

Responsibilities

• Design, optimize, and simulate critical analog and/or mixed-signal circuits.
• Architect and design power delivery for high-performance, stacked memories.
• Analyze, specify, and prototype on-/off-chip interfaces.
• Perform timing, area, power, and complexity analysis for high-performance, low-power circuits.
• Define architectures for improved thermal management.
• Conduct pathfinding activities for future-generation stacked-memory products.
• Compose and maintain clear architecture documentation.

Skills

Analog design

Mixed-signal design

Transistor-level simulation

Power delivery analysis

Architecture tradeoffs

Education

Masters or PhD in EE/CS/CE

Tools

FineSim

HSPICE

Verilog

Job description

Micron Technology in Richardson, TX is seeking a Design Architect at Senior/Principal/Staff level to help build the next generation of high-bandwidth memory for AI workloads. You will design, simulate, analyze, and optimize 3D-stacked memories and interfaces with close collaboration across architecture and design teams.

Responsibilities include defining circuit implementations, power delivery for stacked memories, thermal improvements, and on-/off-chip interfaces, plus timing, area and power