HBM Architect: Mixed-Signal Design, Power & Thermal

Micron Technology

Folsom (CA)

On-site

USD 146,000 - 297,000

Full time

14 days+

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Benefits offered by this job

Medical, dental and vision plans
Paid time-off and holidays
Bonuses and equity may be available

Job summary

Micron Technology is seeking a Design Architect at Senior/Principal/Staff level to shape next-generation high-bandwidth memory (HBM) architectures. You will design, simulate, and optimize analog/mixed-signal circuits and power delivery for 3D-stacked memories, working with peer teams to set specifications and interfaces.

The role emphasizes architecture definition, thermal/power management, and pathfinding for future stacked-memory products, with opportunities to contribute to scripting

Qualifications

  • Experience designing analog/mixed-signal circuits at transistor level.
  • Ability to analyze architecture tradeoffs and translate to specifications.
  • Experience with power delivery analysis and constraints.

Responsibilities

  • Design, optimize, and simulate critical analog/mixed-signal circuits.
  • Architect and design power delivery for high-performance, stacked memories.
  • Analyze, specify, and prototype on-/off-chip interfaces.
  • Perform timing, area, power, and complexity analysis for high-performance circuits.
  • Define architectures for improved thermal management.
  • Conduct pathfinding for future-generation stacked-memory products.
  • Produce and maintain architecture documentation.

Skills

Analog design
Mixed-signal design
Transistor-level sim
Power delivery
Architecture tradeoffs
3D-stacked memory
Verilog
Python
Perl

Education

Masters or PhD in EE/CS/CE

Tools

FineSim
HSPICE

Job description

Micron Technology is seeking a Design Architect at Senior/Principal/Staff level to shape next-generation high-bandwidth memory (HBM) architectures. You will design, simulate, and optimize analog/mixed-signal circuits and power delivery for 3D-stacked memories, working with peer teams to set specifications and interfaces.

The role emphasizes architecture definition, thermal/power management, and pathfinding for future stacked-memory products, with opportunities to contribute to scripting

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