HBM Core‑Die Architect & DRAM Circuit Design Engineer

Micron Technology, Inc.; Boise (ID); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid time off

Paid holidays

Benefits Guide

Job summary

Micron Technology, Inc. in Boise, Idaho seeks an experienced HBM core-die architecture and circuit design engineer.

You will own next-generation HBM core-die architecture, drive circuit feasibility, and develop Architecture Reference Designs for advanced 3D-stacked HBM products. Collaborate with cross-functional teams to optimize bandwidth, power, area, and reliability while supporting silicon bring-up and characterization.

Qualifications

• Proven experience in DRAM architecture and circuit design (HBM, DDR, LPDDR, GDDR, or equivalent).
• Strong understanding of DRAM array architecture, row/column paths, sensing, datapath, refresh, and reliability mechanisms.
• Hands-on experience with SPICE-based circuit simulation tools (HSPICE, Spectre, FineSim, PrimeSim, or equivalent).
• Ability to evaluate performance, power, area, thermal, and reliability trade-offs.
• Experience driving architecture decisions and cross-functional technical execution.
• Strong problem-solving and communication skills.

Responsibilities

• Own HBM core-die architecture including Bank/Bank-Group organization, array partitioning, datapath, refresh, and reliability features.
• Drive critical DRAM circuit design and timing closure for row, column paths, sensing, and datapath paths.
• Develop and optimize architecture solutions for bandwidth, power, area, thermal, and reliability trade-offs.
• Define and validate refresh, row-hammer mitigation, data-retention, and power-efficient operation schemes.
• Lead architecture feasibility studies using transistor-level simulation and physical implementation analysis.
• Develop HBM Architecture Reference Designs (ARD), including golden schematics, timing budgets, and verification methodology.
• Collaborate with Array, Datapath, ECC, TSV, PDN, Layout, Verification, and DFT teams to drive end-to-end design execution.
• Support silicon bring-up, characterization, failure analysis, and architecture-to-design handoff.

Skills

DRAM architecture

Circuit design

SPICE-based simulation

Performance/power/area trade-offs

Cross-functional execution

Communication skills

Tools

HSPICE

Spectre

FineSim

PrimeSim

Job description

Micron Technology, Inc. in Boise, Idaho seeks an experienced HBM core-die architecture and circuit design engineer.

You will own next-generation HBM core-die architecture, drive circuit feasibility, and develop Architecture Reference Designs for advanced 3D-stacked HBM products. Collaborate with cross-functional teams to optimize bandwidth, power, area, and reliability while supporting silicon bring-up and characterization.