Senior ASIC Physical Design Engineer RTL2GDSII & CTS Lead

Cisco Systems, Inc

San Jose (CA)

On-site

USD 155,000 - 223,000

Full time

4 days ago
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Benefits offered by this job

Medical insurance
Dental insurance
Vision insurance
401k with match
Parental leave
Disability insurance
Life insurance
Paid holidays

Job summary

Cisco Systems, Inc is seeking a Physical Design Engineer in San Jose, CA to drive RTL-to-GDSII implementation for advanced semiconductor nodes. You will optimize floorplanning, timing, power integrity, and collaborate across RTL, DFT, and implementation teams to deliver high-performance networking chips.

You will guide clock tree synthesis strategies, perform STA and sign-off, and contribute to automation for STA methodologies, leveraging Innovus, Primetime/Tempus, Redhawk/Voltus, and Calibre.

Qualifications

  • Bachelor’s degree required; 5+ years Physical Design for degree candidates.
  • Master’s degree preferred for more complex roles; PhD optional.
  • Experience with RTL2GDSII flow and 7nm/5nm/3nm or below process nodes.

Responsibilities

  • Lead RTL-to-GDSII implementation with hierarchical floorplanning and place-and-route.
  • Perform static timing analysis and sign-off across multi-mode/multi-corner scenarios.
  • Improve backend design flows and collaborate with RTL, DFT, and EDA vendors.
  • Guide CTS strategies and contribute to STA automation.

Skills

RTL2GDSII flow
Floorplanning
Timing analysis
Power integrity
CTS guidance

Education

Bachelor's Degree in Electrical Engineering
Master's Degree in Electrical Engineering
PhD in Electrical Engineering

Tools

Innovus
Tempus/Primetime
Redhawk/Voltus
Calibre

Job description

Cisco Systems, Inc is seeking a Physical Design Engineer in San Jose, CA to drive RTL-to-GDSII implementation for advanced semiconductor nodes. You will optimize floorplanning, timing, power integrity, and collaborate across RTL, DFT, and implementation teams to deliver high-performance networking chips.

You will guide clock tree synthesis strategies, perform STA and sign-off, and contribute to automation for STA methodologies, leveraging Innovus, Primetime/Tempus, Redhawk/Voltus, and Calibre.

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