Senior ASIC DFT Engineer (Silicon) – High-Impact Tech

SpaceX; Austin (TX); On-site; USD 100,000 - 130,000; Full time

Job summary

Latent AI is looking for a motivated SR. ASIC DFT ENGINEER to implement DFT architectures for next-generation ASICs, deploying in space and ground infrastructures. The role requires 5+ years of DFT engineering experience and involves working with cross-disciplinary teams to create and validate test patterns.

Key qualifications include a Bachelor’s degree in electrical engineering and proficiency in programming languages. The ideal candidate will demonstrate strong problem-solving skills and the ability to work under pressure.

Qualifications

• 5+ years of experience in semiconductor Design For Test (DFT) engineering.
• Experience with post-silicon validation and production testing.
• Excellent problem-solving skills.

Responsibilities

• Implement and optimize DFT architectures.
• Run and debug non-timing simulations.
• Develop test scripts and automate processes.

Skills

DFT architectures implementation and optimization

Using Siemens Tessent tools

Programming languages (Perl, Python, Tcl, C++)

Debugging non-timing and SDF annotated simulations

Experience with ATE platforms

Education

Bachelor’s degree in electrical engineering, computer engineering, or physics

Tools

Siemens Tessent

Automated Test Equipment (e.g., Teradyne, Advantest)

Job description

Latent AI is looking for a motivated SR. ASIC DFT ENGINEER to implement DFT architectures for next-generation ASICs, deploying in space and ground infrastructures. The role requires 5+ years of DFT engineering experience and involves working with cross-disciplinary teams to create and validate test patterns.

Key qualifications include a Bachelor’s degree in electrical engineering and proficiency in programming languages. The ideal candidate will demonstrate strong problem-solving skills and the ability to work under pressure.