Senior ASIC DFT Architect — Remote Contract

Akraya, Inc.; Carlsbad (CA); On-site; USD 96,000 - 103,000; Full time

Job summary

Akraya, Inc. is seeking two lead-caliber ASIC DFT engineers in Carlsbad, CA with remote option.

You will design and implement advanced DFT features for silicon devices powering AI workloads, ensuring testable and manufacturable designs from pre-silicon to post-silicon qualification. Collaborate across RTL, EDA, and test teams to implement scan, MBIST, BIST, boundary scan; debug DFT simulations; support post-silicon testing and production release.

Qualifications

• Bachelor's or Master's degree in Electrical or Computer Engineering.
• 8–10 years of ASIC DFT experience.
• Proficient in JTAG, Scan, and BIST architectures including MBIST.
• Experience with ATPG and EDA tools (Tessent, Xcelium, Genus, Tempus/Primetime).
• Hands-on post-silicon DFT debugging and production release experience.

Responsibilities

• Implement DFT features: scan, MBIST, BIST, boundary scan.
• Set up and debug DFT simulations and support post-silicon testing.
• Collaborate with RTL, IP, and test teams to integrate testability at RTL.
• Develop hardware DFT and physical design for new silicon models (bare die).
• Craft independent, mentorship-light problem-solving for complex issues.

Skills

ASIC DFT

JTAG/Scan/BIST Architectures

ATPG & EDA Tools

Post-Silicon Debug

RTL Integration

Education

Bachelor's or Master's Degree in Electrical or Computer Engineering

Tools

Tessent

Xcelium

Genus

Tempus/Primetime

Job description

Akraya, Inc. is seeking two lead-caliber ASIC DFT engineers in Carlsbad, CA with remote option.

You will design and implement advanced DFT features for silicon devices powering AI workloads, ensuring testable and manufacturable designs from pre-silicon to post-silicon qualification. Collaborate across RTL, EDA, and test teams to implement scan, MBIST, BIST, boundary scan; debug DFT simulations; support post-silicon testing and production release.