Senior ASIC Design Engineer - Front-End & Verification

AMD; San Jose (CA); Hybrid; USD 140,000 - 190,000; Full time

Benefits offered by this job

Benefits at a glance

Job summary

AMD is seeking an ASIC Design Engineer to join its San Jose team. You will work within the front-end design/integration group to deliver high-quality silicon and achieve first-pass silicon success.

Collaborate with Architecture, IP Design, Physical Design, and Product Engineering to drive RTL to GDS efforts and optimize DFT, ATPG, and test coverage. Hybrid work in San Jose, CA is offered and the role emphasizes strong communication and detail orientation.

Qualifications

• Bachelor's or master's degree in computer engineering, Electrical Engineering, or a related field.
• Experience RTL to GDS and Verilog/SystemVerilog.
• Strong communication and problem-solving skills.

Responsibilities

• Implementation and verification of DFT architecture and features.
• Scan insertion and ATPG pattern generation.
• Verification of ATPG patterns using gate-level simulation.
• Test coverage and test cost reduction analysis.
• Post-silicon support to ensure successful bring-up and accelerate yield learning.

Skills

RTL to GDS

Verilog/SystemVerilog

HBM

D2D

Serdes

PCIe

VLSI design

Design Automation

IC design

Physical Design

Floor planning

Synthesis

Place & Route

EDA Tools

UVM/OVM

Verilog testbenches

BFMs

Simulation tools

Scripting

Python

Education

Bachelor's or Master's in Computer/Electrical Engineering

Tools

Synopsys DC Compiler

Primetime

VCS

Cadence Virtuoso

Job description

AMD is seeking an ASIC Design Engineer to join its San Jose team. You will work within the front-end design/integration group to deliver high-quality silicon and achieve first-pass silicon success.

Collaborate with Architecture, IP Design, Physical Design, and Product Engineering to drive RTL to GDS efforts and optimize DFT, ATPG, and test coverage. Hybrid work in San Jose, CA is offered and the role emphasizes strong communication and detail orientation.