Senior Staff DFT & Silicon Verification Architect

AMD; San Jose (CA); Hybrid; USD 180,000 - 240,000; Full time

Benefits offered by this job

AMD Benefits at a glance

Job summary

AMD is seeking a Senior Staff Silicon Design Engineer to join our Silicon Design Engineering team in San Jose, hybrid work model. You will drive DFT architecture, implementation, and bring-up for complex SoCs, collaborating with architecture, design, verification, and manufacturing to ensure testability and high-quality silicon.

You will mentor engineers, influence DFT strategy, and lead cross-functional initiatives across RTL, physical design, and product engineering to deliver industry-leading

Qualifications

• Design-for-Test (DFT) architecture, implementation, and bring-up for complex SoCs.
• RTL design and integration using Verilog/SystemVerilog.
• Experience with high-speed interfaces and complex IPs (HBM, D2D, SerDes, PCIe, memory subsystems).
• Understanding of VLSI design principles, DDA methodologies, and IC development processes.
• Familiarity with floorplanning, synthesis, place-and-route, timing closure, STA.

Responsibilities

• Define, implement, and verify DFT architectures and test features for complex SoCs and IP subsystems.
• Drive scan insertion, ATPG generation, and test methodology development to meet quality targets.
• Develop and execute gate-level simulation strategies for ATPG pattern validation and test readiness.
• Analyze test coverage, diagnose gaps, and drive improvements in test quality and manufacturability.
• Partner with design, verification, physical design, and product engineering to ensure DFT implementation across the development cycle.
• Support silicon bring-up, manufacturing test, failure analysis, and yield improvement activities.
• Develop scalable DFT methodologies, automation solutions, and best practices across projects.
• Provide technical leadership and mentorship across the organization.

Skills

DFT architecture

Verilog/SystemVerilog

HBM/PCIe

VLSI design

EDA tools

UVM/OVM

Scripting (Perl/Tcl/Python)

Technical leadership

Communication

Mentoring

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

Synopsys DFT Compiler

TestMAX

PrimeTime

VCS

Cadence tool suites

Job description

AMD is seeking a Senior Staff Silicon Design Engineer to join our Silicon Design Engineering team in San Jose, hybrid work model. You will drive DFT architecture, implementation, and bring-up for complex SoCs, collaborating with architecture, design, verification, and manufacturing to ensure testability and high-quality silicon.

You will mentor engineers, influence DFT strategy, and lead cross-functional initiatives across RTL, physical design, and product engineering to deliver industry-leading