Remote Verification Engineer — VLSI/UVM Expert

Integral Solutions - Informatica Distributor; Town of Poland (NY); On-site; USD 100,000 - 130,000; Full time

Job summary

Integral Solutions - Informatica Distributor is seeking a Verification Engineer to join their VLSI team. The role is remote and involves verifying the functional correctness of complex digital IP blocks and SoCs using industry-standard methodologies.

The ideal candidate should have at least 5 years of VLSI verification experience, strong proficiency in SystemVerilog and UVM methodology, and a solid understanding of digital design fundamentals. Join a dynamic team focused on delivering high-quality designs.

Qualifications

• 5+ years of hands-on VLSI verification experience in an industry setting.
• Strong proficiency in UVM methodology and SystemVerilog.
• Solid understanding of digital design fundamentals and RTL coding.

Responsibilities

• Develop and maintain constrained-random UVM testbenches for verification.
• Write functional coverage models and closure plans.
• Debug simulation failures and collaborate on fixes.

Skills

VLSI verification experience

SystemVerilog proficiency

UVM methodology proficiency

Specman language proficiency

Industry simulation tools experience

Digital design fundamentals

Assertion-based verification

Education

B.Sc. / M.Sc. / Ph.D. in Electrical Engineering or related field

Tools

VCS

Xcelium

ModelSim/Questa

Job description

Integral Solutions - Informatica Distributor is seeking a Verification Engineer to join their VLSI team. The role is remote and involves verifying the functional correctness of complex digital IP blocks and SoCs using industry-standard methodologies.

The ideal candidate should have at least 5 years of VLSI verification experience, strong proficiency in SystemVerilog and UVM methodology, and a solid understanding of digital design fundamentals. Join a dynamic team focused on delivering high-quality designs.