Senior Design Verification Engineer (SoC/UVM, Remote)

Triple Crown; California (MO); Remote; USD 120,000 - 180,000; Full time

Benefits offered by this job

Health insurance

Dental insurance

Vision insurance

401k

Job summary

A leading engineering talent provider is seeking a Design Verification Engineer for a contract position. The ideal candidate will have 5+ years of experience, strong knowledge in SystemVerilog/UVM, and hands-on experience in IP Block-level and SoC/Full Chip verification. Proficiency in C programming and strong problem-solving skills are essential. This role offers flexible work locations, including remote options.

Qualifications

• 5+ years of relevant experience in design verification.
• Proficiency in SystemVerilog/UVM-based verification.
• Hands-on experience in IP Block-level and SoC/Full Chip verification.

Responsibilities

• Develop and implement verification plans.
• Debug and resolve design issues.
• Test development and debugging using C programming.

Skills

SystemVerilog/UVM

IP Block-level verification

SoC/Full Chip Verification

C programming

Problem-solving skills

Job description

A leading engineering talent provider is seeking a Design Verification Engineer for a contract position. The ideal candidate will have 5+ years of experience, strong knowledge in SystemVerilog/UVM, and hands-on experience in IP Block-level and SoC/Full Chip verification. Proficiency in C programming and strong problem-solving skills are essential. This role offers flexible work locations, including remote options.