Remote Signal & Power Integrity Tech Lead - ASIC Packaging

Cisco Systems

Clayton (MO)

Teletrabalho

USD 214 000 - 310 000

Tempo integral

Há 13 dias

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Resumo da oferta

Cisco Silicon One in San Jose, CA, seeks a Signal and Power Integrity Technical Leader to drive ASIC packaging from concept through production. You will define rules for ultra-high-speed signaling, ensure that power, performance and area targets are met, and collaborate across interposer, substrate, and PCB teams.

Lead and mentor the SI team, partner with system and layout teams to resolve complex issues, and shape design processes for cutting-edge 2.5D packaging used across Cisco platforms.

Qualificações

  • Bachelor’s or higher in Electrical Engineering with extensive SI/PI experience.
  • Experience with high-speed ASIC tape-outs from a package perspective.
  • Hands-on lab experience with ADS, HFSS, and Cadence tools.
  • Strong scripting and modelling skills in MATLAB or Python.

Responsabilidades

  • Define processes, methods, and tools for complex ASIC/package developments.
  • Lead silicon packaging SI/PI teams to meet power, performance and area goals.
  • Mentor engineers and collaborate with layout, design and system partners.
  • Contribute to architecture discussions for high-performance ASICs.
  • Develop and promote design reviews and continuous improvement.
  • Review post-layout extraction and reports for high-volume release.

Conhecimentos

Signal integrity
Power integrity
Leadership
Mentoring

Formação académica

Bachelor's degree in Electrical Engineering
Master's degree in Electrical Engineering
PhD in Electrical Engineering

Ferramentas

Keysight ADS
Ansys HFSS/EM flow
Cadence APD
SPICE

Descrição da oferta de emprego

Cisco Silicon One in San Jose, CA, seeks a Signal and Power Integrity Technical Leader to drive ASIC packaging from concept through production. You will define rules for ultra-high-speed signaling, ensure that power, performance and area targets are met, and collaborate across interposer, substrate, and PCB teams.

Lead and mentor the SI team, partner with system and layout teams to resolve complex issues, and shape design processes for cutting-edge 2.5D packaging used across Cisco platforms.

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