Remote Signal & Power Integrity Tech Lead

Cisco Systems; Miami (FL); Hybrid; USD 214,000 - 310,000; Full time

Job summary

Cisco Systems in San Jose, CA is seeking a Signals and Power Integrity Technical Leader to drive packaging SI/PI and mentor the SI team across multiple projects.

You will define rules for ultra‑high‑speed signaling, analyze SI/PI with layout partners, and develop ASIC packages for high‑volume releases, including post‑layout extraction. Collaborate with system partners and design leads to resolve complex issues and promote continuous improvement.

Qualifications

• Bachelor's degree in Electrical Engineering or higher with 8+ years of SI/PI experience.
• Experience with multiple high-speed ASIC tape-outs from a package perspective.
• Expertise in 56G PAM4 and above, SerDes, channel modeling, BER prediction, transmission line theory, and EM basics.
• Hands-on lab experience with Keysight ADS, Ansys HFSS/EM flow, and Cadence APD for layout review.
• Proficient with SPICE and related circuit simulation tools.

Responsibilities

• Lead the Silicon Packaging SI/PI team to define, design and verify ASIC packaging.
• Develop, document, and implement design rules for ultra-high-speed signaling to meet power/performance/area goals.
• Analyze substrate SI/PI and coordinate with layout for optimal interposer/substrate/PCB solutions.
• Design and document ASIC packages for high-volume releases, including post-layout extraction and reporting.
• Collaborate with system partners and design leads to resolve complex SI/PI issues using advanced rules.
• Define processes, methods, and tools for complex ASIC/package developments.
• Lead or participate in chip architecture discussions for high-performance ASICs.

Skills

Signal integrity

Power integrity

ASIC tape-outs

SPICE

Lab experience

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

PhD in Electrical Engineering

Tools

Keysight ADS

Ansys HFSS

Cadence APD

MATLAB

Python scripting

Raptor-X

Vector Network Analysis

IBIS

Job description

Cisco Systems in San Jose, CA is seeking a Signals and Power Integrity Technical Leader to drive packaging SI/PI and mentor the SI team across multiple projects.

You will define rules for ultra‑high‑speed signaling, analyze SI/PI with layout partners, and develop ASIC packages for high‑volume releases, including post‑layout extraction. Collaborate with system partners and design leads to resolve complex issues and promote continuous improvement.